M95128-DFMC6TG STMicroelectronics, M95128-DFMC6TG Datasheet
M95128-DFMC6TG
Specifications of M95128-DFMC6TG
Related parts for M95128-DFMC6TG
M95128-DFMC6TG Summary of contents
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... Write Protect: quarter, half or whole memory array ■ High-speed clock: 20 MHz ■ Single supply voltage: – 2 5.5 V for M95128-W – 1 5.5 V for M95128-R – 1 5.5 V for M95128-DF ■ Operating temperature range: from -40° +85°C ■ Enhanced ESD protection ■ ...
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... Active Power and Standby Power modes . . . . . . . . . . . . . . . . . . . . . . . . . 14 5.3 Hold condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5.4 Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.5 Data protection and protocol control . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 6 Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 6.1 Write Enable (WREN 6.2 Write Disable (WRDI 6.3 Read Status Register (RDSR 6.3.1 2/ Operating supply voltage Device reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Power-up conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Power-down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 WIP bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Doc ID 5798 Rev 16 M95128-W M95128-R M95128-DF ...
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... Write to Memory Array (WRITE 6.6.1 6.7 Read Identification Page (available only in M95128-D devices 6.8 Write Identification Page (available only in M95128-D devices 6.9 Read Lock Status (available only in M95128-D devices 6.10 Lock ID (available only in M95128-D devices Power-up and delivery state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 7.1 Power-up state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 7.2 Initial delivery state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 8 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . and AC parameters ...
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... Table 18. DC characteristics (M95128-DF, device grade 6 Table 19. AC characteristics (M95128-W, device grade Table 20. AC characteristics (M95128-R, device grade Table 21. AC characteristics (M95128-DF, device grade Table 22. SO8N – 8-lead plastic small outline, 150 mils body width, mechanical data . . . . . . . . . . . 42 Table 23. TSSOP8 – ...
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... SO8N – 8-lead plastic small outline, 150 mils body width, package outline . . . . . . . . . . . . 42 Figure 24. TSSOP8 – 8-lead thin shrink small outline, package outline . . . . . . . . . . . . . . . . . . . . . . . 43 Figure 25. UFDFPN8 (MLP8) – 8-lead ultra thin fine pitch dual flat no lead, package outline Figure 26. M95128-DFCS6TP/K, WLCSP 8-bump wafer-level chip scale package outline . . . . . . . . 45 Doc ID 5798 Rev 16 List of figures 5/49 ...
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... SPI bus. The M95128-W can operate with a supply voltage from 2 5.5 V, the M95128-R can operate with a supply voltage from 1 5.5 V, and the M95128-DF can operate with a supply voltage from 1 5.5 V, over an ambient temperature range of -40 °C / +85 °C. ...
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... M95128-W M95128-R M95128-DF Figure 2. 8-pin package connections (top view) 1. See Section 10: Package mechanical data Figure 3. WLCSP connections (top view, marking side, with balls on the underside) Caution: As EEPROM cells lose their charge (and so their binary value) when exposed to ultra violet (UV) light, EEPROM dice delivered in wafer form or in WLCSP package by STMicroelectronics must never be exposed to UV light ...
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... The memory is organized as shown in the following figure. Figure 4. Block diagram HOLD W Control logic Address register 8/49 High voltage generator I/O shift register and counter Doc ID 5798 Rev 16 M95128-W M95128-R M95128-DF Data register Status Register 1 page X decoder Size of the read-only EEPROM area AI01272d ...
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... M95128-W M95128-R M95128-DF 3 Signal description During all operations (min (max All of the input and output signals must be held high or low (according to voltages specified described next. 3.1 Serial Data Output (Q) This output signal is used to transfer data serially out of the device. Data is shifted out on the falling edge of Serial Clock (C) ...
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... Status Register). This pin must be driven either high or low, and must be stable during all Write instructions. 3.7 V supply voltage the supply voltage. CC 3.8 V ground the reference for all signals, including the V SS 10/49 M95128-W M95128-R M95128-DF supply voltage. CC Doc ID 5798 Rev 16 ...
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... M95128-W M95128-R M95128-DF 4 Connecting to the SPI bus All instructions, addresses and input data bytes are shifted in to the device, most significant bit first. The Serial Data Input (D) is sampled on the first rising edge of the Serial Clock (C) after Chip Select (S) goes low. ...
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... Stand-by mode and not transferring data: ● C remains at 0 for (CPOL=0, CPHA=0) ● C remains at 1 for (CPOL=1, CPHA=1) Figure 6. SPI modes supported CPOL CPHA 12/49 MSB Doc ID 5798 Rev 16 M95128-W M95128-R M95128-DF Figure 6, is the clock polarity when the MSB AI01438B ...
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... M95128-W M95128-R M95128-DF 5 Operating features 5.1 Supply voltage (V 5.1.1 Operating supply voltage V Prior to selecting the memory and issuing instructions to it, a valid and stable V within the specified [V in Section 9: DC and AC end of the transmission of the instruction and, for a Write instruction, until the completion of the internal write cycle (t ...
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... In the specific case where the device has shifted in a Write command (Inst + Address + data bytes, each data byte being exactly 8 bits), deselecting the device also triggers the Write cycle of this decoded command. 14/ (a)(b) Hold condition Figure 7). Doc ID 5798 Rev 16 M95128-W M95128-R M95128-DF supply voltage below the minimum CC Section 9: DC and AC Section 9: DC and AC parameters). Hold condition ), CC ai02029E ...
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... M95128-W M95128-R M95128-DF The Hold condition ends when the Hold (HOLD) signal is driven high when Serial Clock (C) is already low. Figure 7 also shows what happens if the rising and falling edges are not timed to coincide with Serial Clock (C) being low. 5.4 Status Register The Status Register contains a number of status and control bits that can be read or set (as appropriate) by specific instructions ...
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... Write to Memory Array Reads the page dedicated to identification. Writes the page dedicated to identification. Reads the lock status of the Identification Page. Locks the Identification page in read-only mode. Doc ID 5798 Rev 16 M95128-W M95128-R M95128-DF Table 3. Table 3), the device automatically Instruction format 0000 0110 ...
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... M95128-W M95128-R M95128-DF 6.1 Write Enable (WREN) The Write Enable Latch (WEL) bit must be set prior to each WRITE and WRSR instruction. The only way to do this is to send a Write Enable instruction to the device. As shown in Figure and the bits of the instruction byte are shifted in, on Serial Data Input (D). The device then enters a wait state ...
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... C Instruction D High Impedance Instruction Status Register Out MSB Doc ID 5798 Rev 16 M95128-W M95128-R M95128- AI03750D Figure 10. Status Register Out MSB 0 7 AI02031E ...
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... M95128-W M95128-R M95128-DF 6.3.2 WEL bit The Write Enable Latch (WEL) bit indicates the status of the internal Write Enable Latch. When set to 1, the internal Write Enable Latch is set. When set to 0, the internal Write Enable Latch is reset, and no Write or Write Status Register instruction is accepted. ...
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... Instruction Register High Impedance MSB to complete (as specified in AC tables under Table 2. Table 7. When in Write-protected mode, the Write cycle. W Doc ID 5798 Rev 16 M95128-W M95128-R M95128-DF Status AI02282D Section 9: DC ...
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... M95128-W M95128-R M95128-DF Table 7. Protection modes W SRWD signal bit Software- protected 1 1 Hardware protected 1. As defined by the values in the Block Protect (BP1, BP0) bits of the Status Register. See The protection features of the device are summarized in When the Status Register Write Disable (SRWD) bit in the Status Register is 0 (its initial ...
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... Address MSB Table 5, the most significant address bits are Don’t Care. 13, to send this instruction to the device, Chip Select (S) is first driven Doc ID 5798 Rev 16 M95128-W M95128-R M95128- Data Out 1 Data Out ...
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... M95128-W M95128-R M95128-DF Figure 13. Byte Write (WRITE) sequence Instruction D High Impedance Q 1. Depending on the memory size, as shown in In the case of Figure has been latched in, indicating that the instruction is being used to write a single byte. However, if Chip Select (S) continues to be driven low, as shown in of input data is shifted in, so that more than a single byte, starting from the given address towards the end of the same page, can be written in a single internal Write cycle ...
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... Data Byte Table 5, the most significant address bits are Don’t Care. Doc ID 5798 Rev 16 M95128-W M95128-R M95128- Data Byte Data Byte ...
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... M95128-W M95128-R M95128-DF 6.6.1 Cycling with Error Correction Code (ECC) M95128 and M95128-D devices offer an Error Correction Code (ECC) logic. The ECC is an internal logic function which is transparent for the SPI communication protocol. The ECC logic is implemented on each group of four EEPROM bytes single bit out of the four bytes happens to be erroneous during a Read operation, the ECC detects this bit and replaces it with the correct value ...
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... Instructions 6.7 Read Identification Page (available only in M95128-D devices) The Identification Page (64 bytes additional page which can be written and (later) permanently locked in Read-only mode. Reading this page is achieved with the Read Identification Page instruction (see The Chip Select signal (S) is first driven low, the bits of the instruction byte and address bytes are then shifted in, on Serial Data Input (D) ...
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... M95128-W M95128-R M95128-DF 6.8 Write Identification Page (available only in M95128-D devices) The Identification Page (64 bytes additional page which can be written and (later) permanently locked in Read-only mode. Writing this page is achieved with the Write Identification Page instruction (see Chip Select signal (S) is first driven low. The bits of the instruction byte, address bytes, and at least one data byte are then shifted in on Serial Data Input (D) ...
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... Instructions 6.9 Read Lock Status (available only in M95128-D devices) The Read Lock Status instruction (see Page is locked or not in Read-only mode. The Read Lock Status sequence is defined with the Chip Select (S) first driven low. The bits of the instruction byte and address bytes are then shifted in on Serial Data Input (D) ...
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... M95128-W M95128-R M95128-DF 6.10 Lock ID (available only in M95128-D devices) The Lock ID instruction permanently locks the Identification Page in read-only mode. Before this instruction can be accepted, a Write Enable (WREN) instruction must have been executed. The Lock ID instruction is issued by driving Chip Select (S) low, sending the instruction code, the address and a data byte on Serial Data Input (D), and driving Chip Select (S) high ...
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... Initial delivery state The device is delivered with the memory array bits and identification page bits set to all 1s (each byte = FFh). The Status Register Write Disable (SRWD) and Block Protect (BP1 and BP0) bits are initialized to 0. 30/49 M95128-W M95128-R M95128-DF Doc ID 5798 Rev 16 ...
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... M95128-W M95128-R M95128-DF 8 Maximum rating Stressing the device outside the ratings listed in the device. These are stress ratings only, and operation of the device at these, or any other conditions outside those indicated in the operating sections of this specification, is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability ...
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... CC T Ambient operating temperature A Table 10. Operating conditions (M95128-R, device grade 6) Symbol V Supply voltage CC T Ambient operating temperature A Table 11. Operating conditions (M95128-DF, device grade 6) Symbol V Supply voltage CC T Ambient operating temperature A Table 12. AC measurement conditions Symbol C Load capacitance L Input rise and fall times ...
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... M95128-W M95128-R M95128-DF Table 13. Capacitance Symbol C Output capacitance (Q) OUT Input capacitance ( Input capacitance (other pins) 1. Sampled only, not 100% tested Table 14. Cycling performance by groups of four bytes Symbol Parameter Ncycle Write cycle endurance 1. Cycling performance for products identified by process letter K. ...
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... Output high voltage OH 1. For previous products identified with process letter A. 2. For the M95128 devices identified by process letter K. 3. Characterized only, not tested in production µA for previous M95128 devices identified by process letter A. 34/49 M95128-W M95128-R M95128-DF Test conditions in addition to those defined in ...
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... the application uses the M95128-R device with 2.5 V < characteristics (M95128-W, device grade 2. Value tested only for previous M95128 devices identified by process letter A. 3. Only for M95128 devices identified by process letter K. 4. Characterized only, not tested in production µA for previous M95128 devices identified by process letter A. ...
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... Input low voltage IL V Input high voltage IH V Output low voltage OL V Output high voltage the application uses the M95128-DF devices at 2 characteristics (M95128-W, device grade 2. Characterized only, not tested in production. 36/49 Test conditions in addition to those defined in Table 11 and Table ...
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... HZ High Write time Previous products are identified by process letters A. 2. New products are M95128 devices identified by process letter must never be less than the shortest possible clock period Characterized only, not tested in production. Previous and new ...
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... DC and AC parameters Table 20. AC characteristics (M95128-R, device grade 6) Test conditions specified in Symbol Alt. Parameter f f Clock frequency C SCK active setup time SLCH CSS1 not active setup time SHCH CSS2 deselect time SHSL active hold time CHSH ...
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... M95128-W M95128-R M95128-DF Table 21. AC characteristics (M95128-DF, device grade 6) Test conditions specified Clock frequency C SCK active setup time SLCH CSS1 not active setup time SHCH CSS2 deselect time SHSL active hold time CHSH CSH t S not active hold time ...
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... DC and AC parameters Figure 20. Serial input timing S tCHSL C tDVCH D Q Figure 21. Hold timing HOLD 40/49 tSLCH tCH tCHCL tCL tCHDX MSB IN High impedance tHLCH tCLHL tHLQZ Doc ID 5798 Rev 16 M95128-W M95128-R M95128-DF tSHSL tCHSH tSHCH tCLCH LSB IN tHHCH tCLHH tHHQV AI01448c AI01447d ...
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... M95128-W M95128-R M95128-DF Figure 22. Serial output timing S C tCLQV tCLCH tCLQX Q ADDR D LSB IN tCH tCHCL tCL tQLQH tQHQL Doc ID 5798 Rev 16 DC and AC parameters tSHSL tSHQZ AI01449f 41/49 ...
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... Doc ID 5798 Rev 16 M95128-W M95128-R M95128- 45˚ c 0.25 mm GAUGE PLANE SO-A (1) inches Typ Min 0.0039 0.0492 0.0110 0.0067 0.1929 0.1890 0.2362 ...
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... M95128-W M95128-R M95128-DF Figure 24. TSSOP8 – 8-lead thin shrink small outline, package outline Drawing is not to scale. Table 23. TSSOP8 – 8-lead thin shrink small outline, package mechanical data Symbol Values in inches are converted from mm and rounded to four decimal digits. ...
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... Doc ID 5798 Rev 16 M95128-W M95128-R M95128- must not be SS (1) inches Typ Min Max 0.0217 0.0177 0.0236 0.0008 0.0000 0.0020 0.0098 0.0079 0.0118 0.0787 0.0748 ...
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... M95128-W M95128-R M95128-DF Figure 26. M95128-DFCS6TP/K, WLCSP 8-bump wafer-level chip scale package outline 1. Drawing is not to scale. Doc ID 5798 Rev 16 Package mechanical data 45/49 ...
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... Package mechanical data Table 25. M95128-DFCS6TP/K, WLCSP 8-bump wafer-level chip scale package mechanical data Symbol (number of terminals) aaa bbb ccc ddd eee 1. Values in inches are converted from mm and rounded to four decimal digits. 46/49 millimeters Typ Min Max 0 ...
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... M95128-W M95128-R M95128-DF 11 Part numbering Table 26. Ordering information scheme Example: Device type M95 = SPI serial access EEPROM Device function 128 = 128 Kbit (16384 x 8) Device family Blank = Without Identification page D = With additional Identification page Operating voltage 2 1 ...
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... Available M95128x products (package, voltage range, temperature grade) updated. 14 Updated UFDFPN8 package data. Datasheet revision 14 split into: - M95128-125 datasheet for automotive products (range 3), - M95128-W M95128-R M95128-DF (this datasheet) for standard products (range 6). Updated: – Cycling: 4 million cycles 15 – Data retention: 200 years – ...
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... M95128-W M95128-R M95128-DF Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...