M24LR04E-RMC6T/2 STMicroelectronics, M24LR04E-RMC6T/2 Datasheet - Page 112
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M24LR04E-RMC6T/2
Manufacturer Part Number
M24LR04E-RMC6T/2
Description
EEPROM 4-Kbit EEProm 400kHz 13.56Mhz 1.8 to 5.5V
Manufacturer
STMicroelectronics
Datasheet
1.M24LR04E-RDW6T2.pdf
(142 pages)
Specifications of M24LR04E-RMC6T/2
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Command codes
26.21
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Table 97.
Response parameter:
Figure 72. Fast Read Multiple Block frame exchange between VCD and M24LR04E-R
When configured in the RF busy mode, the RF WIP/BUSY pin is tied to 0 from the SOF that
starts the Fast Read Multiple Block command to the end of the M24LR04E-R response.
When configured in the RF write in progress mode, the RF WIP/BUSY pin remains in high-Z
state.
Inventory Initiated
Before receiving the Inventory Initiated command, the M24LR04E-R must have received an
Initiate or a Fast Initiate command in order to set the Initiate_ flag. If not, the M24LR04E-R
does not answer to the Inventory Initiated command.
On receiving the Inventory Initiated request, the M24LR04E-R runs the anticollision
sequence. The Inventory_flag must be set to 1. The meaning of flags 5 to 8 is given in
Table
The request contains:
The M24LR04E-R does not generate any answer in case of error.
Response SOF
M24LR04E-R
Error code as Error_flag is set:
–
–
–
the flags,
the Inventory Command code,
the AFI if the AFI flag is set,
the mask length,
the mask value,
the CRC.
29.
VCD
03h: the option is not supported
10h: block address not available
15h: block read-protected
Fast Read Multiple Block response format when Error_flag is set
Response_flags
SOF
8 bits
Multiple Block
Fast Read
request
Doc ID 022208 Rev 5
Error code
8 bits
EOF
<-t
1
-> SOF
CRC16
16 bits
Multiple Block
Fast Read
response
Response EOF
EOF
M24LR04E-R
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