1894K-32LF IDT, 1894K-32LF Datasheet - Page 23

• Manufacturer Part Number: 1894K-32LF
• Description: Ethernet ICs 3.3V 10/100 PHY RMII
• Manufacturer: IDT

Specifications of 1894K-32LF

• Rohs: yes
• Part # Aliases: ICS1894K-32LF

IDT® 10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
17.11
17.10
17.9
17.8
17.7
17.6
17.5
17.4
17.3
17.2
17.1
17.0
Register
18.15
18.14
18.13
18.12
18.11
18.10
18.9
18.8
18.7
18.6
18.5
18.4
18.3
18.2
18.1
18.0
ICS1894-32
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
Bit
18 - 10Base-T Operations Register
Auto-Negotiation
Progress Monitor Bit 0
100Base-TX signal lost
100BasePLL Lock Error
False Carrier detect
Invalid symbol detected
Halt Symbol detected
Premature End detected
Auto-Negotiation
complete
100Base-TX signal
detect
Jabber detect
Remote fault
Link Status
Remote Jabber Detect
Polarity reversed
Data Bus Mode
AMDIXEN
RXTRI
REGEN
TM_SWITCH
ICS reserved
ICS reserved
Jabber inhibit
ICS reserved
Auto polarity inhibit
SQE test inhibit
Link Loss inhibit
Squelch inhibit
Definition
Reference Decode Table Reference Decode Table
Valid signal
PLL locked
Normal Carrier or Idle
Valid symbols observed
No Halt Symbol received Halt Symbol received
Normal data stream
Auto-Negotiation in
process
Signal present
No jabber detected
Link is not valid
No Remote Jabber
Condition detected
Normal polarity
[1x]=RMII mode
[01]=SI mode (Serial interface mode)
[00]=MII mode
AMDIX disable
RX output enable
Vender reserved register
access enable
Switch TMUX2 to TMUX1, test control
Reserved
Reserved
Normal Jabber behavior
Reserved
corrected
Normal SQE test
behavior
Normal Link Loss
behavior
Normal squelch behavior No squelch
No remote fault detected Remote fault detected
Polarity automatically
When Bit = 0
Invalid symbol received
Signal lost
PLL failed to lock
False Carrier
Stream contained two
IDLE symbols
Auto-Negotiation
complete
No signal present
Jabber detected
Link is valid
Remote Jabber Condition
Detected
Polarity reversed
AMDIX enable
RX tri-state for MII/RMII
interface
Vender reserved register
(byte25~byte31) access
disable
Reserved
Reserved
Jabber Check disabled
Reserved
Polarity not automatically
corrected
SQE test disabled
Link Always = Link Pass
When Bit = 1
23
Access
RW/0
RW/0
RW/1
RW
RW
RW
RW
RW
RW
RW
RW
RW
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
R0
R0
2
SF
LM
LH
LH
LH
LH
LH
LH
LH
LH
LH
LH
LL
X
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
ICS1894-32
2
Default
0
0
0
0
0
0
0
0
1
0
0
0
0
0
–
L
L
L
L
0
–
–
0
1
0
0
0
0
PHYCEIVER
3
REV M 021512
Hex
0
0
8
–
–
–
0