1894K-32LF IDT, 1894K-32LF Datasheet - Page 24

• Manufacturer Part Number: 1894K-32LF
• Description: Ethernet ICs 3.3V 10/100 PHY RMII
• Manufacturer: IDT

Specifications of 1894K-32LF

• Rohs: yes
• Part # Aliases: ICS1894K-32LF

IDT® 10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
Register
19.15
19.14
19.13
19.12
19.11
19.10
19.9
19.8
19.7
19.6
19.5
19.4
19.3
19.2
19.1
19.0
Register
ICS1894-32
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
20.15
20.14
20.13
20.12
Bit
19 - Extended Control Register
20 - Extended Control Register
Node Mode
Hardware/Software
Mode Speed Select
Remote Fault
Register Bank select
ICS reserved
AMDIX_EN
MDI_MODE
Twisted Pair Tri-State
Enable, TPTRI
ICS reserved
ICS reserved
ICS reserved
ICS reserved
ICS reserved
ICS reserved
Automatic 100Base-TX
Power Down
ICS reserved
ICS reserved
Str_enhance
Definition
Node mode
Use bit00.13 to select
speed
[01]=Bank1, access register0x00~0x13 and
[00]=Bank0, access register0x00~0x13, new defined
[1x]=Bank0, same as [00]
Reserved
See Table on page 11
See Table on page 11
Twisted Pair Signals are
not Tri-Stated or No
effect
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Do not automatically
power down
Normal digital output
strength
Reserved
Reserved
No faults detected
ICS1893CF registers 0x14~0x1F
registers 0x14~0x25
When Bit = 0
Reserved
Repeater mode (mode not
supported)
Use real time input pin 22
only to select speed
Remote fault detected
See Table on page 11
See Table on page 11
Twisted Pair Signals are
Tri-Stated
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Power down automatically
Enhance digital output
strength in 1.8V condition
Reserved
Reserved
When Bit = 1
24
Access
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RO
RO
2
SF
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
ICS1894-32
2
Default
L
L
0
0
0
0
1
0
0
0
0
0
0
0
0
1
0
0
1
1
PHYCEIVER
3
REV M 021512
Hex
3
–
2
0
1