1894KI-40LF IDT, 1894KI-40LF Datasheet - Page 41
1894KI-40LF
Manufacturer Part Number
1894KI-40LF
Description
Ethernet ICs 3.3V 10/100 PHY RMII
Manufacturer
IDT
Datasheet
1.1894KI-40LFT.pdf
(53 pages)
Specifications of 1894KI-40LF
Rohs
yes
Part # Aliases
ICS1894KI-40LF
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100M MII: Carrier Assertion/De-Assertion (Half-Duplex Transmission)
100M MII Carrier Assertion/De-Assertion Timing Diagram (Half-Duplex Transmission Only)
IDT® 10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
ICS1894-40
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
TXEN
TXCLK
CRS
The table below lists the significant time periods for the 100M MII carrier assertion/de-assertion during half-duplex
transmission. The time periods consist of timings of signals on the following pins:
•
•
•
The 100M MII Carrier Assertion/De-Assertion Timing Diagram (Half-Duplex Transmission Only) shows the timing
diagram for the time periods.
Period
TXEN
TXCLK
CRS
Time
t1
t2
TXEN Sampled Asserted to CRS Assert
TXEN De-Asserted to CRS De-Asserted
t1
Parameter
t2
Conditions
41
Min.
0
0
Typ.
3
3
ICS1894-40
Max.
4
4
PHYCEIVER
REV K 022412
Bit times
Bit times
Units
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