ACS422A68TAGZBX8 IDT, ACS422A68TAGZBX8 Datasheet - Page 59

• Manufacturer Part Number: ACS422A68TAGZBX8
• Description: Interface - CODECs
• Manufacturer: IDT

Specifications of ACS422A68TAGZBX8

• Rohs: yes
• Part # Aliases: IDTACS422A68TAGZBX8

ACS422x68
LOW-POWER, HIGH-FIDELITY, INTEGRATED CODEC
©2011 INTEGRATED DEVICE TECHNOLOGY, INC.
The two DMIC data inputs are shown connected to the ADCs through the same multiplexors as the analog ports.
Although the internal implementation is different between the analog ports and the digital microphones, the functionality
is the same. In most cases, the default values for the DMIC clock rate and data sample phase will be appropriate and
an audio driver will be able to configure and use the digital microphones exactly like an analog microphone.
If the ADC path is powered down, the DMIC_CLK output will be driven low to place the DMIC element into a low power
state. (Many digital microphones will enter a low power state if the clock input is held at a DC level or toggled at a slow
rate.)
SDM Rate
Half
Full
DMRate [1:0]
00
01
10
00
01
10
11
11
Base Rate
44.1 KHz
44.1 KHz
44.1 KHz
44.1 KHz
44.1 KHz
44.1 KHz
44.1 KHz
44.1 KHz
32 KHz
48 KHz
32 KHz
48 KHz
32 KHz
48 KHz
32 KHz
48 KHz
32 KHz
48 KHz
32 KHz
48 KHz
32 KHz
48 KHz
32 KHz
48 KHz
Table 66. DMIC Clock
40.960 MHz
56.448 MHz
61.440 MHz
40.960 MHz
56.448 MHz
61.440 MHz
40.960 MHz
56.448 MHz
61.440 MHz
40.960 MHz
56.448 MHz
61.440 MHz
40.960 MHz
56.448 MHz
61.440 MHz
40.960 MHz
56.448 MHz
61.440 MHz
40.960 MHz
56.448 MHz
61.440 MHz
40.960 MHz
56.448 MHz
61.440 MHz
59
DSPCLK
DMIC_CLK
divisor
12
16
16
16
20
20
20
24
24
24
32
32
16
16
16
24
24
24
32
32
32
40
40
40
3.413333 MHz
1.706667 MHz
1.706667 Mhz
2.8224 MHz
1.4112 MHz
DMIC_CLK
3.528 MHz
3.072 MHz
2.352 MHz
1.764 MHz
3.528 MHz
2.352 MHz
1.764 MHz
1.024 MHz
1.536 MHz
2.048 Mhz
3.84 MHz
2.56 MHz
1.92 MHz
2.56 MHz
3.84 MHz
2.56 MHz
1.28 MHz
1.92 MHz
2.56 Mhz
ACS422X68
V1.6 01/13