MAX9260GCB/V+TGG4 Maxim Integrated, MAX9260GCB/V+TGG4 Datasheet - Page 14

• Manufacturer Part Number: MAX9260GCB/V+TGG4
• Description: Serializers & Deserializers - Serdes Multimedia Serial Link
• Manufacturer: Maxim Integrated
• Type: Deserializerr

Specifications of MAX9260GCB/V+TGG4

• Rohs: yes
• Data Rate: 2.5 Gbit/s
• Input Type: CML
• Output Type: CMOS/LVCMOS
• Number Of Inputs: 1
• Number Of Outputs: 30
• Operating Supply Voltage: 1.7 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: TQFP-64 EP
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT

When using low-capacity filter capacitors, such as
ceramic capacitors, size is usually determined by the
capacity needed to prevent voltage droop and volt-
age rise from causing problems during load transients.
Generally, once enough capacitance is added to meet
the overshoot requirement, undershoot at the rising load
edge is no longer a problem. However, low-capacity filter
capacitors typically have high-ESR zeros that can affect
the overall stability.
The device requires an external Schottky diode recti-
fier as a freewheeling diode. Connect this rectifier close
to the device using short leads and short PCB traces.
Choose a rectifier with a voltage rating greater than the
maximum expected input voltage, V
forward-voltage-drop Schottky rectifier to limit the nega-
tive voltage at LX. Avoid higher than necessary reverse-
voltage Schottky rectifiers that have higher forward-
voltage drops.
The device uses an internal transconductance error
amplifier with its inverting input and its output available
to the user for external frequency compensation. The
output capacitor and compensation network determine
the loop stability. The inductor and the output capaci-
tor are chosen based on performance, size, and cost.
Additionally, the compensation network optimizes the
control-loop stability.
The controller uses a current-mode control scheme that
regulates the output voltage by forcing the required current
through the external inductor. The device uses the volt-
age drop across the high-side MOSFET to sense inductor
current. Current-mode control eliminates the double pole
Figure 3. Compensation Network
R
R
1
2
V
OUT
V
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REF
Compensation Network
g
m
C
R
C
C
Rectifier Selection
SUPSW
36V, 2.2MHz Step-Down Converter
COMP
. Use a low
C
F
with Low Operating Current
in the feedback loop caused by the inductor and output
capacitor, resulting in a smaller phase shift and requiring
less elaborate error-amplifier compensation than voltage-
mode control. Only a simple single-series resistor (R
and capacitor (C
bandwidth loop in applications where ceramic capacitors
are used for output filtering
capacitors, due to the higher capacitance and ESR, the
frequency of the zero created by the capacitance and
ESR is lower than the desired closed-loop crossover fre-
quency. To stabilize a nonceramic output capacitor loop,
add another compensation capacitor (C
GND to cancel this ESR zero.
The basic regulator loop is modeled as a power modula-
tor, output feedback divider, and an error amplifier. The
power modulator has a DC gain set by g
with a pole and zero pair set by R
capacitor (C
allow to approximate the value for the gain of the power
modulator (GAIN
ramp stabilization. Ramp stabilization is necessary when
the duty cycle is above 50% and is internally done for
the device.
where R
In a current-mode step-down converter, the output
capacitor, its ESR, and the load resistance introduce a
pole at the following frequency:
The output capacitor and its ESR also introduce a zero at:
When C
in parallel, the resulting C
ESR = ESR
parallel combination of alike capacitors is the same as
for an individual capacitor.
The feedback voltage-divider has a gain of GAIN
V
The transconductance error amplifier has a DC gain of
GAIN
FB
/V
EA(DC)
OUT
LOAD
OUT
, where V
(EACH)
= g
OUT
GAIN
f
is composed of “n” identical capacitors
= V
pMOD
f
m,EA
zMOD
), and its ESR. The following equations
C
MOD(DC)
OUT
MOD(DC)
/n. Note that the capacitor zero for a
) are required to have a stable, high-
FB
=
x R
/I
=
is 1V (typ).
2
LOUT(MAX)
π ×
OUT,EA
2
π ×
), neglecting the effect of the
OUT
C
(Figure
= g
ESR C
OUT
, where g
mc
MAX16907
1
1
= n x C
×
×
in I, and g
× R
R
3). For other types of
OUT
LOAD
LOAD
LOAD
F
m,EA
OUT(EACH)
) from COMP to
mc
, the output
is the error-
mc
x R
= 3S.
LOAD
FB
and
C
=
)
,