FT201XQ-R FTDI, FT201XQ-R Datasheet - Page 13

• Manufacturer Part Number: FT201XQ-R
• Description: USB Interface IC USB to I2C IC QFN-16
• Manufacturer: FTDI

Specifications of FT201XQ-R

• Rohs: yes
• Product: USB 2.0
• Data Rate: 12 Mbps, 480 Mbps
• Interface Type: I2C, USB
• Operating Supply Voltage: 2.97 V to 5.5 V
• Operating Supply Current: 6.4 mA to 8.65 mA
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: QFN-16
• Tradename: X-Chip

FT201X USB I2C SLAVE IC Datasheet
Version 1.3
Document No.: FT_000627 Clearance No.: FTDI# 264
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Function Description
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The FT201X is a USB to I
C interface device which simplifies USB implementations and reduces external
component count by fully integrating into the device an EEPROM, and a clock circuit which requires no
external crystal. It has been designed to operate efficiently with USB host controllers by using as little
bandwidth as possible when compared to the total USB bandwidth available.
4.1 Key Features
Functional Integration. Fully integrated MTP memory, clock generation, AVCC filtering, Power-On-
Reset (POR) and LDO regulators.
Configurable CBUS I/O Pin Options. The fully integrated MTP memory allows configuration of the
Control Bus (CBUS) functionality and drive strength selection. There are 6 configurable CBUS I/O pins.
These configurable options are defined in section 3.3.
The device is shipped with the most commonly used pin definitions pre-programmed - see Section 9 for
details.
Asynchronous Bit Bang Mode with RD# and WR# Strobes. The FT201X supports FTDI’s previous
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chip generation bit-bang mode. In bit-bang mode, the 2 I
C lines can be switched from the regular
interface mode to a 2-bit general purpose I/O port. Data packets can be sent to the device and they will
be sequentially sent to the interface at a rate controlled by an internal timer (equivalent to the baud rate
pre-scalar). In the FT201X device this mode has been enhanced by outputting the internal RD# and WR#
strobes signals which can be used to allow external logic to be clocked by accesses to the bit-bang I/O
bus. This option will be described more fully in a separate application note available from FTDI website
(www.ftdichip.com).
Synchronous Bit Bang Mode. The FT201X supports synchronous bit bang mode. This mode differs from
asynchronous bit bang mode in that the interface pins are only read when the device is written to. This
makes it easier for the controlling program to measure the response to an output stimulus as the data
returned is synchronous to the output data. An application note, AN232R-01, available from FTDI website
(www.ftdichip.com) describes this feature.
Source Power and Power Consumption. The FT201X is capable of operating at a voltage supply
between +3.3V and +5.25V with a nominal operational mode current of 8mA and a nominal USB suspend
mode current of 125µA. This allows greater margin for peripheral designs to meet the USB suspend mode
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current limit of 2.5mA. An integrated level converter within the I
C interface allows the FT201X to
interface to UART logic running at +1.8V to +3.3V (5V tolerant).
4.2 Functional Block Descriptions
The following paragraphs detail each function within the FT201X. Please refer to the block diagram shown
in Figure 2.1
Internal MTP Memory. The internal MTP memory in the FT201X is used to store USB Vendor ID (VID),
Product ID (PID), device serial number, product description string and various other USB configuration
descriptors. The internal MTP memory is also used to configure the CBUS pin functions. The FT201X is
supplied with the internal MTP memory pre-programmed as described in Section 9. A user area of the
internal MTP memory is available to system designers to allow storing of additional data from the user
application over USB. The internal MTP memory descriptors can be programmed in circuit, over USB
without any additional voltage requirement. The descriptors can be programmed using the FTDI utility
software called FT_PROG, which can be downloaded from FTDI Utilities on the FTDI website
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(www.ftdichip.com). Additionally the MTP memory can be configured over the I
C interface.
+1.8V LDO Regulator. The +1.8V LDO regulator generates the +1.8V reference voltage for driving the
internal core of the IC.
+3.3V LDO Regulator. The +3.3V LDO regulator generates the +3.3V reference voltage for driving the
USB transceiver cell output buffers. It requires an external decoupling capacitor to be attached to the
3V3OUT regulator output pin. It also provides +3.3V power to the 1.5kΩ internal pull up resistor on
USBDP. The main function of the LDO is to power the USB Transceiver and the Reset Generator Cells
rather than to power external logic. However, it can be used to supply external circuitry requiring a
+3.3V nominal supply with a maximum current of 50mA.
USB Transceiver. The USB Transceiver Cell provides the USB 1.1 / USB 2.0 full-speed physical interface
to the USB cable. The output drivers provide +3.3V level slew rate control signalling, whilst a differential
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