FT201XQ-R FTDI, FT201XQ-R Datasheet - Page 39

• Manufacturer Part Number: FT201XQ-R
• Description: USB Interface IC USB to I2C IC QFN-16
• Manufacturer: FTDI

Specifications of FT201XQ-R

• Rohs: yes
• Product: USB 2.0
• Data Rate: 12 Mbps, 480 Mbps
• Interface Type: I2C, USB
• Operating Supply Voltage: 2.97 V to 5.5 V
• Operating Supply Current: 6.4 mA to 8.65 mA
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: QFN-16
• Tradename: X-Chip

10.5.4
When performing MTP memory write and read requests via the I
MTP address command along with 2 bytes representing the MTP memory address. The acknowledge
phase of this command represents the current status of the MTP memory (whether it is busy or not). If
the MTP memory is being accessed during an I
will NAK the master. The address will only be updated when the MTP memory is inactive.
Writing
The first part of the communication sets the address, and this is followed by the write command along
with the data to be written. The MTP memory write itself will be initiated when the FT201X receives an
MTP memory write command followed by a single data byte. The ACK phase represents the current
activity of the MTP memory (whether it is busy or not busy). A successful write will only occur when both
status phases acknowledge the master indicating that the MTP memory can start the write. Users wishing
to determine if the MTP memory write was successful should immediately try an MTP memory read to
verify the new contents.
This process of writing to the MTP memory is shown below:
Figure 10.2: Write EEPROM command sequence
Reading
In a similar way, the read is carried out as shown below.The first part of the communication sets the
address, and this is followed by the read command and a read cycle used to retrieve the data read back
from that address.
An MTP memory read will be initiated when the I
acknowledge during the command phase indicates whether or not the MTP memory will be able to service
the read request. If it is possible to carry out the read, the I
either continue with the read transaction until the slave successful returns an ACK along with the data or
if it receives NAK during the data phase it can abort the read transfer and try again.
Figure 10.3: Read EEPROM command sequence
S/Sr General call addr R/!W
S/Sr General call addr R/!W
S/Sr General call addr R/!W
S/Sr General call addr R/!W
0000000
0000000
0000000
0000000
Examples of Writing and Reading
Copyright © 2013 Future Technology Devices International Limited
0
0
0
0
A
A
A
A
MTP ADDR cmd
MTP ADDR cmd
MTP WR cmd
MTP WR cmd
0001_0000
0001_0010
0001_0000
0001_0100
A/!A
A/!A
A/!A
A/!A
MTP Memory Address Phase
MTP Memory Address Phase
MTP memory Write Phase
MTP memory Read Phase
Sr
Sr
Sr
Sr
2
C access then the respective command and data phases
2
C slave receives an MTP read command. The
Slave addr
Slave addr
Slave addr
Slave addr
FT201X USB I2C SLAVE IC Datasheet
Document No.: FT_000627 Clearance No.: FTDI# 264
2
C moves into the data phase where it can
R/!W
R/!W
R/!W
R/!W
0
0
0
1
2
C protocol, users must first issue the
A
A
A
A
MTP WR DATA
MTP WR DATA
MTP ADR MSB
MTP ADR MSB
A
A
A
A
P/Sr
P/Sr
Version 1.3
MTP ADR LSB
MTP ADR LSB
39
A
A