FT201XQ-R FTDI, FT201XQ-R Datasheet - Page 38

• Manufacturer Part Number: FT201XQ-R
• Description: USB Interface IC USB to I2C IC QFN-16
• Manufacturer: FTDI

Specifications of FT201XQ-R

• Rohs: yes
• Product: USB 2.0
• Data Rate: 12 Mbps, 480 Mbps
• Interface Type: I2C, USB
• Operating Supply Voltage: 2.97 V to 5.5 V
• Operating Supply Current: 6.4 mA to 8.65 mA
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: QFN-16
• Tradename: X-Chip

User Memory Area
The User Memory Areas are highlighted in Green on the memory map. They can be read and written via
both USB and I
functions and there is no checksum for the user area.
Note that the application should take into account the specification for the number of write cycles in
Section 6.4 if it will be writing to the MTP memory multiple times.
Configuration Memory Area (writable)
This area stores the configuration data for the device, including the data which is returned to the host in
the configuration descriptors (e.g. the VID, PID and string descriptions) and also values which set the
hardware configuration (the signal assigned to each CBUS pin for example).
These values can have a significant effect on the behaviour of the device. Steps must be taken to ensure
that these locations are not written to un-intentionally by an application which is intended to access only
the user area.
This area is included in a checksum which covers configuration areas of the memory, and so changing
any value can also cause this checksum to fail.
Configuration Memory Area (non-writable)
This is a reserved area and the application should not write to this area of memory. Any attempt to write
these locations will fail.
10.4 Hardware Requirements
The hardware is the same as for a typical USB-I
programming voltages are required. The I
USB connections, either a bus-powered configuration (see Section 7.1 and 7.3) or a self-powered
configuration (see Section 7.2) could be used.
10.5 Protocol
The I
For further details on the I
10.5.1
This consists of a general call with a command phase followed by 2 data bytes which represent the MTP
memory address allowing users to address, potentially, up to 64K byte addresses.
10.5.2
This consists of a general call with a command phase followed by 1 data byte which shall be programmed
into the MTP memory at the address location set by the MTP memory address command.
10.5.3
This consists of a general call with a command phase followed by 1 data byte which is the data read from
the MTP memory at the address location set by the MTP memory address command.



2
C MTP memory protocol consists of 3 commands:
Address MTP memory (0x10)
Write MTP memory (0x12)
Read MTP memory (0x14)
2
Address MTP memory (0x10)
Write MTP memory (0x12)
Read MTP memory (0x14)
C. All locations within this range are freely programmable; no areas have special
Copyright © 2013 Future Technology Devices International Limited
2
C protocol, refer to section
2
C connections are the same as shown in Section 8.1. For the
2
C application and no additional hardware or
FT201X USB I2C SLAVE IC Datasheet
5
.
Document No.: FT_000627 Clearance No.: FTDI# 264
Version 1.3
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