C8051F560-IQR Silicon Labs, C8051F560-IQR Datasheet - Page 189

• Manufacturer Part Number: C8051F560-IQR
• Description: 8-bit Microcontrollers - MCU 50 MIPS 32 kB 2 kB CAN2.0 LIN 2.1 SPI
• Manufacturer: Silicon Labs

Specifications of C8051F560-IQR

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit

SFR Definition 19.27. P3SKIP: Port 3Skip
SFR Address = 0xD7; SFR Page = 0x0F
SFR Definition 19.28. P4: Port 4
SFR Address = 0xB5; SFR Page = All Pages
Note: P3.0 is available on 40-pin and 32-pin packages. P3.1-P3.7 are available on 40-pin packages
Note: Port 4.0 is available on 40-pin packages.
Name
Reset
Name
Reset
Bit
7:0
Bit
7:0
Type
Type
Bit
Bit
P3SKIP[7:0]
P4[7:0]
Name
Name
7
0
7
1
Port 4 Data.
Sets the Port latch logic
value or reads the Port pin
logic state in Port cells con-
figured for digital I/O.
Port 3 Crossbar Skip Enable Bits.
These bits select Port 3 pins to be skipped by the Crossbar Decoder. Port pins
used for analog, special functions or GPIO should be skipped by the Crossbar.
0: Corresponding P3.n pin is not skipped by the Crossbar.
1: Corresponding P3.n pin is skipped by the Crossbar.
6
0
6
1
Description
5
0
5
1
Rev. 1.1
0: Set output latch to logic
LOW.
1: Set output latch to logic
HIGH.
4
0
4
1
P3SKIP[7:0]
P4[7:0]
R/W
R/W
Function
Write
3
0
3
1
C8051F55x/56x/57x
2
0
2
1
0: P4.n Port pin is logic
LOW.
1: P4.n Port pin is logic
HIGH.
1
0
1
1
Read
0
0
0
1
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