AT89LP51ED2-20AU Atmel, AT89LP51ED2-20AU Datasheet - Page 116

• Manufacturer Part Number: AT89LP51ED2-20AU
• Description: 8-bit Microcontrollers - MCU 64KB 20MHz 2.4V-5.5V
• Manufacturer: Atmel

Specifications of AT89LP51ED2-20AU

• Rohs: yes
• Core: 8051
• Processor Series: AT89x
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 256 B
• On-chip Adc: Yes
• Operating Supply Voltage: 2.4 V to 5.5 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: TQFP-44
• Mounting Style: SMD/SMT
• Data Rom Size: 4 KB
• Interface Type: 2-Wire, SPI, UART
• Number Of Programmable I/os: 36
• Number Of Timers: 3
• Program Memory Type: Flash
• Factory Pack Quantity: 160

Table 17-7.
17.3
17.4
116
BDRCON Address = 9BH
Not Bit Addressable
Bit
Symbol
BRR
TBCK
RBCK
SPD
SRC
Framing Error Detection
Automatic Address Recognition
AT89LP51RD2/ED2/ID2 Preliminary
–
7
Function
Baud Rate Run Control
Clear to stop the Internal Baud Rate Generator. Set to start the Internal Baud Rate Generator.
Transmission Baud Rate Select
Clear to select Timer 1 or Timer 2 overflow as transmit clock for the serial port. Set to select the Internal Baud Rate
Generator as transmit clock for the serial port.
Receive Baud Rate Select
Clear to select Timer 1 or Timer 2 overflow as receive clock for the serial port. Set to select the Internal Baud Rate
Generator as receive clock for the serial port.
BRG Speed Control
Clear to select the SLOW baud rate generator mode. Set to select the FAST baud rate generator mode.
Baud Rate Source for Mod e 0
Clear to select fixed or Timer 1 clock source for UART mode 0. Set to select BRG for UART mode 0.
BDRCON – Baud Rate Control Register
–
6
In addition to all of its usual modes, the UART can perform framing error detection by looking for
missing stop bits. When used for framing error detect, the UART looks for missing stop bits in
the communication. A missing bit will set the FE bit in the SCON register. The FE bit shares the
SCON.7 bit with SM0 and the function of SCON.7 is determined by PCON.6 (SMOD0). If
SMOD0 is set then SCON.7 functions as FE. SCON.7 functions as SM0 when SMOD0 is
cleared. When used as FE, SCON.7 can only be cleared by software. The FE bit will be set by a
framing error regardless of the state of SMOD0.
Automatic Address Recognition is a feature which allows the UART to recognize certain
addresses in the serial bit stream by using hardware to make the comparisons. This feature
saves a great deal of software overhead by eliminating the need for the software to examine
every serial address which passes by the serial port. This feature is enabled by setting the SM2
bit in SCON for Modes 1, 2 or 3. In the 9-bit UART modes, Mode 2 and Mode 3, the Receive
Interrupt flag (RI) will be automatically set when the received byte contains either the “Given”
address or the “Broadcast” address. The 9-bit mode requires that the 9th information bit be a “1”
to indicate that the received information is an address and not data.
In Mode 1 (8-bit) the RI flag will be set if SM2 is enabled and the information received has a valid
stop bit following the 8th address bits and the information is either a Given or Broadcast
address. Using the Automatic Address Recognition feature allows a master to selectively com-
municate with one or more slaves by invoking the given slave address or addresses. All of the
slaves may be contacted by using the Broadcast address. Automatic Address Recognition is not
available during Mode 0.
–
5
BRR
4
TBCK
3
RBCK
2
Reset Value = xxx0 0000B
SPD
1
SRC
3714A–MICRO–7/11
0