AT89LP51ED2-20AU Atmel, AT89LP51ED2-20AU Datasheet - Page 151

• Manufacturer Part Number: AT89LP51ED2-20AU
• Description: 8-bit Microcontrollers - MCU 64KB 20MHz 2.4V-5.5V
• Manufacturer: Atmel

Specifications of AT89LP51ED2-20AU

• Rohs: yes
• Core: 8051
• Processor Series: AT89x
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 256 B
• On-chip Adc: Yes
• Operating Supply Voltage: 2.4 V to 5.5 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: TQFP-44
• Mounting Style: SMD/SMT
• Data Rom Size: 4 KB
• Interface Type: 2-Wire, SPI, UART
• Number Of Programmable I/os: 36
• Number Of Timers: 3
• Program Memory Type: Flash
• Factory Pack Quantity: 160

Table 19-7.
3714A–MICRO–7/11
Status
Code
(SSCS)
08h
10h
38h
40h
48h
50h
58h
Status of the Two-wire
Serial Bus and Two-wire
Serial Interface Hardware
A START condition has
been transmitted
A repeated START
condition has been
transmitted
Arbitration lost in SLA+R or
NOT ACK bit
SLA+R has been
transmitted; ACK has been
received
SLA+R has been
transmitted; NOT ACK has
been received
Data byte has been
received; ACK has been
returned
Data byte has been
received; NOT ACK has
been returned
Status Codes for Master Receiver Mode
To/from SSDAT
Load SLA+R
Load SLA+R
Load SLA+W
No action
No action
No action
No action
No action
No action
No action
Read data byte
Read data byte
Read data byte
Read data byte
Read data byte
Application Software Response
STA
0
0
0
0
1
0
0
1
0
1
0
0
1
0
1
AT89LP51RD2/ED2/ID2 Preliminary
STO
0
0
0
0
0
0
0
0
1
1
0
0
0
1
1
To SSCON
SI
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
AA
X
X
X
X
X
X
X
X
X
X
X
0
1
0
1
Next Action Taken by TWI Hardware
SLA+R will be transmitted; ACK or NOT ACK
will be received
SLA+R will be transmitted; ACK or NOT ACK
will be received
SLA+W will be transmitted; Logic will switch to
Master Transmitter mode
Two-wire Serial Bus will be released and not
addressed Slave mode will be entered
A START condition will be transmitted when the
bus becomes free
Data byte will be received and NOT ACK will be
returned
Data byte will be received and ACK will be
returned
Repeated START will be transmitted
STOP condition will be transmitted and STO
flag will be reset
STOP condition followed by a START condition
will be transmitted and STO flag will be reset
Data byte will be received and NOT ACK will be
returned
Data byte will be received and ACK will be
returned
Repeated START will be transmitted
STOP condition will be transmitted and STO
flag will be reset
STOP condition followed by a START condition
will be transmitted and STO flag will be reset
151