C8051T326-GMR Silicon Labs, C8051T326-GMR Datasheet - Page 85

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C8051T326-GMR

Manufacturer Part Number
C8051T326-GMR
Description
8-bit Microcontrollers - MCU USB-OTP-16K-QFN28
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051T326-GMR

Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
15. Memory Organization
The memory organization of the CIP-51 System Controller is similar to that of a standard 8051. There are
two separate memory spaces: program memory and data memory. Program and data memory share the
same address space but are accessed via different instruction types. The memory organization of the
C8051T620/621/320/321/322/323 device family is shown in Figure 15.1
15.1. Program Memory
The CIP-51 core has a 64 kB program memory space. The C8051T620/621/320/321/322/323 implements
16384 bytes of this program memory space as in-system byte-programmable EPROM organized in a con-
tiguous block from addresses 0x0000 to 0x3FFF. Note: 512 bytes (0x3E00 – 0x3FFF) of this memory are
reserved for factory use and are not available for user program storage. C2 Register Definition 15.2 shows
the program memory maps for C8051T620/621/320/321/322/323 devices.
0x3DFF
0x3FFF
0x3E00
0x0000
PROGRAM/DATA MEMORY
16k Bytes EPROM
RESERVED
(EPROM)
Memory
Figure 15.1. Memory Map
C8051T620/621/320/321/322/323
0xFFFF
0x03FF
0x0400
0x0000
0xFF
0x7F
0x2F
0x1F
0x80
0x30
0x20
0x00
Rev. 1.1
XRAM - 1024 Bytes
0x0000 to 0x03FF, wrapped
(accessable using MOVX
Same 1024 bytes as from
on 1024-byte boundaries
(Indirect Addressing
(Direct and Indirect
EXTERNAL DATA ADDRESS SPACE
INTERNAL DATA ADDRESS SPACE
General Purpose
Upper 128 RAM
Bit Addressable
Addressing)
instruction)
Registers
Only)
DATA MEMORY (RAM)
(Direct Addressing Only)
Special Function
Lower 128 RAM
(Direct and Indirect
Addressing)
Register's
USB FIFOs
1024 Bytes
0x07FF
0x0400
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