HEF4894BT-Q100,118 NXP Semiconductors, HEF4894BT-Q100,118 Datasheet - Page 8

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HEF4894BT-Q100,118

Manufacturer Part Number
HEF4894BT-Q100,118
Description
Counter Shift Registers
Manufacturer
NXP Semiconductors
Datasheet

Specifications of HEF4894BT-Q100,118

Rohs
yes
Package / Case
SO-20
Logic Family
HEF
Logic Type
Shift Register
Number Of Input Lines
1
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Function
Shift and Store Register
Mounting Style
SMD/SMT
Operating Supply Voltage
3 V to 15 V
Product
Driver ICs - Various
Supply Voltage - Max
15 V
Supply Voltage - Min
3 V
NXP Semiconductors
Table 7.
V
[1]
[2]
[3]
Table 8.
P
HEF4894B_Q100
Product data sheet
Symbol Parameter
t
t
t
t
t
t
f
Symbol Parameter
P
en
dis
t
W
su
h
clk(max)
SS
D
D
can be calculated from the formulas shown. V
= 0 V; T
The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (C
t
t
en
t
is the same as t
is the same as t
transition time
pulse width
set-up time
hold time
maximum clock
frequency
dynamic power
dissipation
Dynamic characteristics
amb
Dynamic power dissipation
= 25
TLH
PZL
C unless otherwise specified. For test circuit see
and t
and t
THL
dis
.
Conditions
OE to QPn;
see
OE to QPn;
see
QS1, QS2;
see
see
STR; HIGH;
see
D to CP;
see
D to CP;
see
CP; see
CP; LOW and HIGH;
is the same as t
Figure 8
Figure 8
Figure 6
Figure 6
Figure 7
Figure 9
Figure 9
V
10 V
15 V
5 V
DD
…continued
Figure 6
All information provided in this document is subject to legal disclaimers.
Typical formula
P
P
P
D
D
D
PLZ
= 1200  f
= 5550  f
= 15000  f
.
SS
= 0 V; t
Rev. 1 — 12 July 2012
V
10 V
15 V
10 V
15 V
10 V
15 V
10 V
15 V
10 V
15 V
10 V
15 V
10 V
15 V
10 V
15 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
5 V
DD
i
i
+ (f
+ (f
i
r
+ (f
= t
[2]
[2]
[1][3]
f
o
o
o
 C
 C
20 ns; T
 C
Extrapolation formula
35 ns + (1.00 ns/pF)C
19 ns + (0.42 ns/pF)C
16 ns + (0.28 ns/pF)C
L
L
)  V
)  V
L
)  V
Figure
12-stage shift-and-store register LED driver
amb
DD
DD
DD
2
2
2
= 25
W
W
10.
W
C.
HEF4894B-Q100
Where
f
f
C
(f
V
i
o
DD
= input frequency in MHz;
L
= output frequency in MHz;
o
= output load capacitance in pF;
L
L
L
 C
= supply voltage in V.
L
Min
-
) = sum of the outputs;
60
30
24
80
60
24
60
20
15
+5
20
20
11
14
5
-
-
-
-
-
-
-
-
Typ
100
15
55
50
40
30
30
15
12
40
30
12
30
10
80
85
40
30
10
22
28
© NXP B.V. 2012. All rights reserved.
5
5
5
Max
200
110
100
160
170
-
-
-
L
80
60
80
60
in pF).
-
-
-
-
-
-
-
-
-
-
-
-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
MHz
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