74HC1G08GW-Q100,12 NXP Semiconductors, 74HC1G08GW-Q100,12 Datasheet

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74HC1G08GW-Q100,12

Manufacturer Part Number
74HC1G08GW-Q100,12
Description
Logic Gates 2-IN AND Gate 6V
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74HC1G08GW-Q100,12

Product
AND
Logic Family
74HC
Number Of Lines (input / Output)
2 /
Propagation Delay Time
135 ns
Supply Voltage - Max
6 V
Supply Voltage - Min
2 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
TSSOP-5
Maximum Power Dissipation
200 mW
Minimum Operating Temperature
- 40 C
Number Of Input Lines
2
Operating Temperature Range
- 40 C to + 125 C
Output Current
12.5 mA
Power Dissipation
200 mW
Part # Aliases
74HC1G08GW-Q100,12
1. General description
2. Features and benefits
3. Ordering information
Table 1.
Type number
74HC1G08GW-Q100
74HCT1G08GW-Q100
74HC1G08GV-Q100
74HCT1G08GV-Q100
Ordering information
74HC1G08-Q100 and 74HCT1G08-Q100 are high-speed, Si-gate CMOS devices. They
provide a 2-input AND function.
The HC device has CMOS input switching levels and supply voltage range 2 V to 6 V.
The HCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V.
The standard output currents are half of those of the 74HC08-Q100 and 74HCT08-Q100.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
Package
Temperature range Name
40 C to +125 C
40 C to +125 C
74HC1G08-Q100; 74HCT1G08-Q100
2-input AND gate
Rev. 2 — 16 August 2012
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Symmetrical output impedance
High noise immunity
Low power dissipation
Balanced propagation delays
ESD protection:
Multiple package options
Specified from 40 C to +85 C and from 40 C to +125 C
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )
TSSOP5 plastic thin shrink small outline package; 5 leads;
SC-74A
Description
body width 1.25 mm
plastic surface-mounted package; 5 leads
Product data sheet
Version
SOT353-1
SOT753

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74HC1G08GW-Q100,12 Summary of contents

Page 1

... Multiple package options 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name 40 C to +125 C 74HC1G08GW-Q100 74HCT1G08GW-Q100 40 C to +125 C 74HC1G08GV-Q100 74HCT1G08GV-Q100 Description TSSOP5 plastic thin shrink small outline package; 5 leads; body width 1.25 mm SC-74A plastic surface-mounted package; 5 leads ...

Page 2

... NXP Semiconductors 4. Marking Table 2. Marking codes Type number 74HC1G08GW-Q100 74HCT1G08GW-Q100 74HC1G08GV-Q100 74HCT1G08GV-Q100 [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram Fig 1. Logic symbol Fig 3. Logic diagram 6. Pinning information 6.1 Pinning Fig 4. Pin configuration ...

Page 3

... NXP Semiconductors 6.2 Pin description Table 3. Pin description Symbol Pin GND Functional description Table 4. Function table H = HIGH voltage level LOW voltage level Input Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). ...

Page 4

... NXP Semiconductors 9. Recommended operating conditions Table 6. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC V input voltage I V output voltage O T ambient temperature amb t/V input transition rise and fall rate 10. Static characteristics Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V) ...

Page 5

... NXP Semiconductors Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V). All typical values are measured at T Symbol Parameter 74HCT1G08-Q100 V HIGH-level input IH voltage V LOW-level input IL voltage V HIGH-level output OH voltage V LOW-level output OL voltage I input leakage current I I supply current CC I additional supply ...

Page 6

... NXP Semiconductors Table 8. Dynamic characteristics  GND = 6.0 ns; All typical values are measured Symbol Parameter Conditions C power dissipation V = GND capacitance [ the same as t and PLH PHL [ used to determine the dynamic power dissipation P PD  ...

Page 7

... NXP Semiconductors 13. Package outline TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1. DIMENSIONS (mm are the original dimensions UNIT max. 0.1 1.0 mm 1.1 0.15 0 0.8 Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE ...

Page 8

... NXP Semiconductors Plastic surface-mounted package; 5 leads DIMENSIONS (mm are the original dimensions) UNIT 0.100 1.1 0.40 0.26 mm 0.013 0.9 0.25 0.10 OUTLINE VERSION IEC SOT753 Fig 8. Package outline SOT753 (SC-74A) 74HC_HCT1G08_Q100 Product data sheet 74HC1G08-Q100; 74HCT1G08-Q100 scale ...

Page 9

... NXP Semiconductors 14. Abbreviations Table 9. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor TTL Transistor-Transistor Logic HBM Human Body Model ESD ElectroStatic Discharge MM Machine Model DUT Device Under Test 15. Revision history Table 10. Revision history Document ID Release date 74HC_HCT1G08_Q100 v.2 20120816 Modifications: 74HC_HCT1G08_Q100 v.1 20120605 ...

Page 10

... Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

Page 11

... NXP Semiconductors No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations ...

Page 12

... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 4 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Functional description . . . . . . . . . . . . . . . . . . . 3 8 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 5 12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 13 Package outline ...

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