HEF4052BT-Q100 NXP Semiconductors, HEF4052BT-Q100 Datasheet - Page 13

• Manufacturer Part Number: HEF4052BT-Q100
• Description: Encoders, Decoders, Multiplexers & Demultiplexers 4-ChanMux/Demux 15V
• Manufacturer: NXP Semiconductors

Specifications of HEF4052BT-Q100

• Product: Multiplexers / Demultiplexers
• Logic Family: HEF
• Number Of Lines (input / Output): 4 / 4
• Supply Voltage - Max: 15 V
• Supply Voltage - Min: 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: SO-16
• Minimum Operating Temperature: - 40 C
• Number Of Input Lines: 4
• Number Of Output Lines: 4
• Operating Temperature Range: - 40 C to + 125 C
• Operating Voltage: 5 V to 15 V
• Power Dissipation: 500 mW
• Part # Aliases: HEF4052BT-Q100,118

NXP Semiconductors
Table 11.
V
[1]
Table 12.
P
HEF4052B_Q100
Product data sheet
Symbol
THD
f

V
Xtalk
Symbol
P
(3dB)
SS
D
Fig 17. Test circuit for measuring total harmonic
iso
ct
D
can be calculated from the formulas shown; V
= V
f
i
is biased at 0.5 V
V
EE
DD
or V
distortion
= 0 V; T
Additional dynamic characteristics
Dynamic power dissipation P
Parameter
dynamic power
dissipation
V
SS
SS
11.2.1 Test circuits
Parameter
total harmonic distortion
3 dB frequency response
isolation (OFF-state)
crosstalk voltage
crosstalk
11.2 Additional dynamic parameters
amb
S1 and S2
nZ
f i
DD
= 25
; V
E
V
I
DD
= 0.5V

C.
nYn
V
V
5 V
10 V
15 V
SS
DD
DD
= V
(p-p).
EE
All information provided in this document is subject to legal disclaimers.
R L
Typical formula for P
P
P
P
D
Conditions
see
channel ON; V
f
see
channel ON; V
see
C
V
digital inputs to switch; see
R
E or Sn = V
between switches; see
f
V
D
D
D
i
i
I
I
= 1 kHz
L
L
= 1 MHz; R
= 1300  f
= 6100  f
= 15600  f
= 0.5V
= 0.5V
= 5 pF; channel OFF;
= 10 k; C
001aak638
C L
Figure
Figure
Figure
EE
= V
Rev. 1 — 12 July 2012
D
DD
DD
SS
17; R
18; R
19; f
DD
i
i
(p-p)
(p-p)
L
+ (f
+ (f
i
= 0 V; t
L
+ (f
= 1 k;
I
I
(square-wave)
= 15 pF;
= 0.5V
= 0.5V
i
L
L
= 1 MHz; R
o
o
= 10 k; C
= 1 k; C
o
 C
 C
Fig 18. Test circuit for measuring frequency response
 C
D
r
Dual 4-channel analog multiplexer/demultiplexer
= t
DD
DD
(W)
L
L
Figure
)  V
)  V
L
V
f
)  V
(p-p);
(p-p)
DD

Figure
20 ns; T
L
L
or V
DD
DD
L
= 5 pF;
= 1 k;
DD
= 15 pF;
21;
V
2
2
SS
SS
2
20;
amb
S1 and S2
nZ
f i
= 25
V
5 V
10 V
15 V
5 V
10 V
15 V
10 V
10 V
10 V
where:
f
f
C
V
(C
HEF4052B-Q100
i
o
E
DD
DD
= input frequency in MHz;
L
= output frequency in MHz;
V
= output load capacitance in pF;
L
DD

= supply voltage in V;
C.
 f
nYn
o
V
) = sum of the outputs.
SS
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
= V
Typ
0.25
0.04
0.04
13
40
70
50
50
50
EE
© NXP B.V. 2012. All rights reserved.
R L
Max
-
-
-
-
-
-
-
001aak639
C L
-
-
dB
13 of 21
Unit
%
%
%
MHz
MHz
MHz
dB
mV
dB