RSENC-DBLK-P2-U4 Lattice, RSENC-DBLK-P2-U4 Datasheet - Page 11

• Manufacturer Part Number: RSENC-DBLK-P2-U4
• Description: Encoders, Decoders, Multiplexers & Demultiplexers Dynamic Block Reed Solomon Encoder
• Manufacturer: Lattice

Specifications of RSENC-DBLK-P2-U4

• Factory Pack Quantity: 1

Lattice Semiconductor
IPUG40_03.6, August 2010
Field Polynomial
The field polynomial is defined by its decimal value (f). The decimal value of a field polynomial is obtained by set-
ting x=2 in the polynomial. For example, the polynomial x
nomial can be specified as any prime polynomial with decimal value up to 2
Generator Polynomial
The generator polynomial determines the value of the check symbols. The generator polynomial can be defined by
the parameters starting root (gstart) and root spacing (rootspace). The general form of the generator polyno-
mial is given by:
where a (alpha) is called the primitive element of the field polynomial. For a binary Galois field GF(2), a (alpha) is
equal to 2.
Shortened Codes
When the size of the Reed-Solomon codewords, n, is less than the maximum possible size, 2
called shortened codes. For example, RS (204,188) when wsymb = 8 is a shortened code. Only the non-zero data
is transmitted to the encoder (i.e., 188 in the above example). The encoder then generates the required check sym-
bols from the non-zero data.
Output Latency
Output Latency for the Reed-Solomon Encoder core is defined as the number of clock cycles between the sam-
pling of the first input data and the availability of the first data at the output port. It is three clock cycles when the
inputs are registered and two clock cycles otherwise.
Functional Description
The Reed-Solomon Encoder utilizes Multiplier, Adder and Remainder arrays to perform finite field arithmetic. A
block diagram of the Reed-Solomon Encoder is shown in
of the arrays and the Control block.
Figure 2-2. Systematic Reed-Solomon Encoder
Multiplier Array
The Multiplier array performs the Galois field multiplication between the generator coefficients and the modulo-2
sum of input data and feedback data. This multiplication is optimized during the processing of the core.
Adder Array
The Adder array performs modulo-2 addition on the data from the previous element of the Remainder array and the
result of the corresponding Galois field multiplication from the Multiplier array. The outputs from the Adder array are
latched into the Remainder array on each clock cycle.
wsymb bits wide
DATA
k-1
DATA
1
DATA
0
Reed-Solomon
g(x)
Encoder
=
n-k-1
i = 0

(x - 
rootspace
11 Dynamic Block Reed-Solomon Encoder User’s Guide
CHECK
2
+ x + 1 in decimal value is 2
Figure
n-k-1
n-k Check Symbols

(gstart + i)
2-2. The following section explains the operation
CHECK
)
1
wsymb+1
CHECK
Codeword
0
- 1.
DATA
Functional Description
2
k Information Symbols
k-1
+ 2 + 1 = 7. The field poly-
DATA
wsymb
1
DATA
- 1, they are
0
(1)