AP-CF512ME3FR-NRJ Apacer, AP-CF512ME3FR-NRJ Datasheet - Page 49

• Manufacturer Part Number: AP-CF512ME3FR-NRJ
• Description: Memory Cards CFC 3 STD TMP 512MB COMPACT FLASH CARD
• Manufacturer: Apacer

Specifications of AP-CF512ME3FR-NRJ

• Rohs: yes
• Product: Compact Flash
• Memory Size: 512 MB
• Operating Supply Voltage: 3.3 V, 5 V
• Maximum Operating Temperature: + 70 C
• Dimensions: 42.8 mm x 36.4 mm x 3.3 mm
• Minimum Operating Temperature: 0 C

7.2.7 Ultra DMA Mode Data Transfer Input/Output (Read/Write) Timing
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
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T
T
© 2009 Apacer Technology Inc.
Name
2CYCTYP
CYC
2CYC
DS
DH
DVS
DVH
CS
CH
CVS
CVH
ZFS
DZFS
FS
LI
MLI
UI
AZ
ZAH
ZAD
ENV
RFS
RP
IORDYZ
ZIORDY
ACK
SS
Typical sustained average two cycle time
Cycle time allowing for asymmetry and clock
variations (from STROBE edge to STROBE
edge)
Two cycle time allowing for clock variations
(from rising edge to next rising edge or from
falling edge to next falling edge of STROBE)
Data setup time at recipient (from data valid until
STROBE edge)
Data hold time at Recipient (from STROBE edge
until data becomes invalid)
Data valid setup time for Sender (from data valid
until STROBE edge)
Data valid hold time at Sender (from STROBE
edge until data becomes invalid)
CRC word setup time at device
CRC word hold time at device
CRC word valid setup time at host (from CRC
valid until DMACK negation)
CRC word valid hold time at Sender (from
DMACK negation until CRC becomes invalid)
Time from STROBE output released-to-driving
until the first transition of critical timing
Time from data output released-to-driving until
the first transition of critical timing
First STROBE time (for device to first negate
DSTROBE from STOP during a data in burst)
Limited interlock time
Interlock time with minimum
Unlimited interlock time
Maximum time allowed for output drivers to
release (from asserted to negated)
Minimum delay time required for output
Drivers to assert or negate (from released)
Envelope time (from DMACK# to STOP and
HDMARDY# during data in burst initiation and
from DMACK to STOP during data our burst
initiation)
Ready-to-final STROBE time (no STROBE edge
are sent this long after negation of DMARDY)
Ready-to-pause time (Recipient waits to pause
until after negating DMARDY)
Maximum time before releasing IORDY
Minimum time before driving IORDY
Value Added
Value Added
Value Added
Value Added
Table 7-11 Ultra DMA Data Burst Timing Specifications
4,5
Descriptions
6
7
4
AP-CFxxxxE3XR-XXXXJ
1,2
4
3
1
Compact Flash Ⅲ Ⅲ Ⅲ Ⅲ series
1
3
10
48
3
Min
100
5.0
5.0
6.0
6.0
5.0
5.0
6.7
6.2
6.7
60
25
57
20
20
20
20
50
0
0
0
0
0
Mode 4
Max
120
100
10
55
60
20
1
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Measurement
Location
Recipient
Recipient
Recipient
Sender
Sender
Sender
Sender
Sender
Sender
Sender
Device
Device
Device
Device
Device
Device
Device
Note
Note
Note
Host
Host
Host
Host
Host
Host
Host
Rev. 1.6
3
8
9
2