DS2282/87-22282-000 Maxim Integrated, DS2282/87-22282-000 Datasheet - Page 15

• Manufacturer Part Number: DS2282/87-22282-000
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS2282/87-22282-000

• Supply Current (max): 30 mA
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Package / Case: SIL-30
• Minimum Operating Temperature: 0 C
• Operating Supply Voltage: 5 V
• Part # Aliases: 90-22820-000

54016 OPERATION
In order to properly operate on T1 lines running the FDL
under the definition spelled out in the AT&T Publication
TR 54016, the DS2282 must have the 54016 bit in the
UBR set to one (see “User Register”). The DS2282
monitors the incoming FDL for maintenance messages
from the network. It will decode these messages and re-
spond accordingly. The DS2282 will automatically mon-
itor the T1 and accumulate the statistics that might be
requested from the network. All of the information that is
gathered by the DS2282 is locally available to the user.
The 54016 register set in the DS2282 mimics the regis-
ters defined in TR 54016. When the DS2282 is not re-
sponding to maintenance messages, it transmits FFh or
7Eh programmed by the control register (CR) of user
bits (UB) in the hardware mode.
CSR: Current Status Register (20).
Current Status Register (CSR) contains information on
whether an unavailable signal state or Payload Loop-
back is active.
CSR: Current Status Register (20)
F
U
ESFEER: ESF Error Event Register (21).
16–bit register that counts ESF error events. Each ESF
is checked for the occurrence of an error event. An error
event is defined as the logical OR’ing of CRC–6 error
events and Out Of Frame (OOF) events. A CRC–6 error
event occurs when the locally calculated CRC–6 code
does not match the incoming CRC–6 code. An OOF
event occurs when 2 out of 4 consecutive framing bits
are received in error.
UEEER: User ESF Error Event Register (36). A
16–bit register that mimics the ESF Error Event Register
(ESFEER). Unlike the ESFEER, the UEEER is user
clearable once saturated by network error events. This
simplifies operations when user registers are created
external from the DS2282.
L
(MSB)
F
U
L=1 if the Payload Loopback (PLB) is active
F=1 if either U or L is set to a one
U=1 if an unavailable signal state exists
0
0
0
0
L
The 8–bit
(LSB)
0
A
CIT: Current Interval Timer (22).
that counts the number of seconds in the current 15 min-
ute interval. Since there can only be 900 seconds in a 15
minute interval, this register will never saturate. Since
all of the time intervals in the DS2282 are derived from
the T1 source, the accuracy of this timer depends on the
accuracy of the RCLK signal.
Current Interval Registers
The current interval registers count the number of
events that have occurred in the current 15 minute inter-
val. There are five separate current interval registers.
They are:
Each of these current interval registers is 16 bits in
length. Please see “54016 Definitions” for definitions of
ES, UAS, BES, SES, CSS, and LOFC.
Interval Count Registers
The interval count registers are a set of 96 separate
16–bit registers that contain the number of events that
have occurred in each of the previous 96, individual 15
minute periods. Or in other words, the interval count
registers contain the performance of the T1 line for the
previous 24 hours broken into 15 minute periods. There
are five separate interval count registers. They are:
Please see “54016 Definitions” for definitions of ES,
UAS, BES, SES, CSS, and LOFC.
CIESR (23)
CIUASR (24)
CIBESR (25)
CISESR (26)
CICSLFR (27) counts Controlled Slip Seconds (CSS)
ESICR (28)
UASICR (29)
BESICR (2A)
SESICR (2B)
CSLFICR (2C) contains Controlled Slip Seconds (CSS)
counts Errored Seconds (ES)
counts Unavailable Seconds (UAS)
counts Bursty Errored Seconds (BES)
counts Severely Errored Seconds
(SES)
and Loss Of Frame Counts (LOFC)
contains Errored Seconds (ES)
contains Unavailable Seconds (UAS)
contains Bursty Errored Seconds (BES)
contains Severely Errored Seconds
(SES)
and Loss Of Frame Counts (LOFC)
A 16–bit register
022798 15/22
DS2282