DS2282/87-22282-000 Maxim Integrated, DS2282/87-22282-000 Datasheet - Page 8

• Manufacturer Part Number: DS2282/87-22282-000
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS2282/87-22282-000

• Supply Current (max): 30 mA
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Package / Case: SIL-30
• Minimum Operating Temperature: 0 C
• Operating Supply Voltage: 5 V
• Part # Aliases: 90-22820-000

STATUS REGISTER SUMMARY Table 2
USER REGISTER SUMMARY Table 3
LOOPBACK CONTROL REGISTER SUMMARY Table 4
SOFTWARE VERSION AND LEVEL REGISTER SUMMARY Table 4A
T1.403 REGISTER SET SUMMARY Table 5
DS2282
022798 8/22
NAME
SR
NAME
UBR
NAME
LBCR
NAME
SWVR
SWLR
NAME
CRCCR
BPVCR
OOFCR
FECR
ESR
SESR
UASR
PRMR0
PRMR1
PRMR2
PRMR3
RUMR
1
1
1
1
1
1
1
1
1
1
ADDR
ADDR
ADDR
ADDR
ADDR
3F
3E
0A
0B
0C
0D
0E
04
14
35
08
09
10
11
12
13
18
2,3
2,3
2,3
2,3
2,3
R/W
R/W
R/W
R/W
R/W
W
W
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
CLEARABLE
CLEARABLE
CLEARABLE
CLEARABLE
CLEARABLE
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
No
No
No
No
No
DESCRIPTION
Status Register. An 8–bit register that reports alarm
conditions. See “Status Register.”
DESCRIPTION
User Bit Register. An 8–bit register that sets the position
of the six available user bits. See “User Register.”
DESCRIPTION
Loopback Control Register. An 8–bit register that
determines the actions of the PLB and LLB pins. See
“Loopback Control.”
DESCRIPTION
Software Version Register. An 8–bit register that
reports the DS2282 software version.
Software Version Level Register. An 8–bit register
that reports the DS2282 software version level in two’s
complement format.
DESCRIPTION
CRC Count Register. A 16–bit register that counts
CRC–6 error events.
BPV Count Register. A 24–bit register that counts bipo-
lar violations.
OOF Count Register. A 16–bit register that counts OOF
error events.
Frame Error Count Register. A 16–bit register that
counts errors in the FPS framing pattern.
Errored Second Register. A 16–bit register that counts
ES.
Severely Errored Second Register. A 16–bit register
that counts SES.
Unavailable Seconds Register. A 16–bit register that
counts UAS.
Performance Report Message Registers. Four 8–bit
registers that contain the PRMs that were received in the
FDL in the last four seconds.
Receive Unscheduled Message Register. An 8–bit
register that reports unscheduled messages as they are
received.