XRT83SH314ES Exar, XRT83SH314ES Datasheet - Page 26

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XRT83SH314ES

Manufacturer Part Number
XRT83SH314ES
Description
Peripheral Drivers & Components - PCIs 14 CHT1/E1LIU SH
Manufacturer
Exar
Datasheet

Specifications of XRT83SH314ES

Product Category
Peripheral Drivers & Components - PCIs
Rohs
yes
XRT83SH314
14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
In T1 mode, RLOS is declared if an incoming signal has no transitions over a period of 175 +/-75 contiguous
pulse intervals. However, the XRT83SH314 LIU has a built in analog RLOS so that the user can be notified
when the amplitude of the incoming signal has been attenuated -9dB below the equalizer gain setting. For
example: In T1 or E1 short haul mode, the gain setting is 15dB. Once the input reaches an amplitude of -24dB
below nominal, the LIU will declare RLOS. The RLOS circuitry clears when the input reaches +3dB relative to
where it was declared. This +3dB value is a pre-determined hysteresis so that transients will not cause the
RLOS to clear. In E1 mode, RLOS is declared if an incoming signal has no transitions for N consecutive pulse
intervals, where 10≤N≤255. According to G.775, no transitions in E1 mode is defined between -9dB and -35dB
below nominal.
analog RLOS values for the different equalizer gain settings.
F
N
By enabling the extended loss of signal by programming the appropriate channel register, the digital RLOS is
extended to count 4,096 consecutive zeros before declaring RLOS in T1 and E1 mode. By default, EXLOS is
disabled and RLOS operates in normal mode.
The XRT83SH314 adheres to the ITU-T G.775 specification for an all ones pattern. The alarm indication signal
is set to "1" if an all ones pattern (at least 99.9% ones density) is present for T, where T is 3ms to 75ms in T1
mode. AIS will clear when the ones density is not met within the same time period T. In E1 mode, the AIS is
set to "1" if the incoming signal has 2 or less zeros in a 512-bit window. AIS will clear when the incoming signal
has 3 or more zeros in the 512-bit window.
2.2.3.1
2.2.3.2
2.2.3.3
IGURE
OTE
: For programming the equalizer gain setting on a per channel basis, see the microprocessor register map for details.
29dB (Monitoring Gain Mode)
15dB (Short Haul Mode)
11. A
G
NALOG
AIN
RLOS (Receiver Loss of Signal)
EXLOS (Extended Loss of Signal)
AIS (Alarm Indication Signal)
Figure 11
+3dB
S
ETTING
T
R
ABLE
ECEIVE
5: A
is a simplified block diagram of the analog RLOS function.
-9dB
L
NALOG
OS OF
S
RLOS D
IGNAL FOR
+3dB
ECLARE
T1/E1/J1
D
-24dB
-38dB
ECLARE
22
/C
-9dB
LEAR
(T
YPICAL
Normalized up to EQC[4:0] Setting
Normalized up to EQC[4:0] Setting
Clear LOS
Declare LOS
Declare LOS
Clear LOS
V
ALUES
)
FOR
T1/E1
Table 5
C
-21dB
-35dB
LEAR
summarizes the
REV. 1.0.4

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