XRT83SH314ES Exar, XRT83SH314ES Datasheet - Page 6

• Manufacturer Part Number: XRT83SH314ES
• Description: Peripheral Drivers & Components - PCIs 14 CHT1/E1LIU SH
• Manufacturer: Exar

Specifications of XRT83SH314ES

• Product Category: Peripheral Drivers & Components - PCIs
• Rohs: yes

XRT83SH314
14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
5.0 MICROPROCESSOR INTERFACE BLOCK ........................................................................................60
6.0 REGISTER DESCRIPTIONS ................................................................................................................69
F
F
F
F
F
F
F
F
T
F
T
T
T
F
T
F
T
F
T
F
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
F
T
T
T
T
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
ABLE
IGURE
ABLE
ABLE
ABLE
IGURE
ABLE
IGURE
ABLE
IGURE
ABLE
IGURE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
IGURE
ABLE
ABLE
ABLE
ABLE
5.1 THE MICROPROCESSOR INTERFACE BLOCK SIGNALS ......................................................................... 61
5.2 INTEL MODE PROGRAMMED I/O ACCESS (ASYNCHRONOUS) ............................................................... 63
5.3 MPC86X MODE PROGRAMMED I/O ACCESS (SYNCHRONOUS) ............................................................. 66
6.1 REGISTER LISTS ........................................................................................................................................... 69
6.2 DETAIL BIT DESCRIPTIONS ......................................................................................................................... 71
14: S
15: XRT84SH314S M
16: I
17: M
18: I
19: I
20: M
21: M
22: M
23: M
24: M
25: M
26: C
27: M
28: M
29: M
30: M
31: M
33: M
32: M
34: M
35: M
36: M
37: M
38: M
39: M
40: M
41: M
42: M
43: M
44: M
45: M
46: M
47: M
48: M
49: M
50: M
51: M
52: M
53: M
54: E1 A
4.8.2 INTRINSIC JITTER...................................................................................................................................................... 57
4.8.3 JITTER TRANSFER CURVE ...................................................................................................................................... 59
6.2.1 CLOCK SELECT REGISTER...................................................................................................................................... 87
48. J
49. J
50. J
51. J
52. T
53. I
54. E1 I
55. T
56. S
57. I
58. I
59. M
60. M
61. R
NTEL MODE
NTEL
NTEL
ELECTING THE
NTRINSIC
NTEL
NTEL
ABLE
OTOROLA
OTOROLA
OTOROLA
ICROPROCESSOR
ICROPROCESSOR
ICROPROCESSOR
ICROPROCESSOR
ICROPROCESSOR
ICROPROCESSOR
ICROPROCESSOR
ICROPROCESSOR
ICROPROCESSOR
ICROPROCESSOR
ICROPROCESSOR
ICROPROCESSOR
ICROPROCESSOR
ICROPROCESSOR
ICROPROCESSOR
ICROPROCESSOR
ICROPROCESSOR
ICROPROCESSOR
ICROPROCESSOR
ICROPROCESSOR
ICROPROCESSOR
ICROPROCESSOR
ICROPROCESSOR
ICROPROCESSOR
ICROPROCESSOR
ICROPROCESSOR
ICROPROCESSOR
ICROPROCESSOR
ICROPROCESSOR
ICROPROCESSOR
ICROPROCESSOR
ITTER
ITTER
ITTER
ITTER
EST
EST
IMPLIFIED
EGISTER
OTOROLA
OTOROLA
RBITRARY
M
M
NTRINSIC
C
C
µP I
µP I
L
ICROPROCESSOR
ICROPROCESSOR
T
T
T
T
ENGTH
IRCUIT FOR
IRCUIT FOR
RANSFER
RANSFER
RANSFER
RANSFER
J
NTERFACE
NTERFACE
: M
M
MPC86X M
68K M
0
ITTER
B
MPC86X µP I
68K µP I
X
ODE
LOCK
E9
ICROPROCESSOR
S
C
J
M
ELECT
H
ITTER
ONTROL
ICROPROCESSOR
: M
- T1 M
ICROPROCESSOR
ICROPROCESSOR
S
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
F
F
F
F
D
I
J
UNCTION
UNCTION
UNCTION
UNCTION
NTRINSIC
UB
ICROPROCESSOR
EGISTER
EGISTER
EGISTER
EGISTER
EGISTER
EGISTER
EGISTER
EGISTER
EGISTER
EGISTER
EGISTER
EGISTER
EGISTER
EGISTER
EGISTER
EGISTER
EGISTER
EGISTER
EGISTER
EGISTER
EGISTER
EGISTER
EGISTER
EGISTER
EGISTER
EGISTER
EGISTER
EGISTER
EGISTER
EGISTER
EGISTER
ITTER
IAGRAM OF THE
NTERFACE
T
S
........................................................................................................................................................ 90
- M
IMING
ICROPROCESSOR
IGNALS
R
I
I
.................................................................................................................................................... 72
EGISTERS
NTERFACE
NTERFACE
AX
AX
NTERFACE
T
RANSFER
.
.
D
A
C
G
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
- E1 TX 1.5H
- E1 RX 10H
- E1 RX 10H
- E1 RX 1.5H
J
VALUE MEASURED
VALUE MEASURED
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
D
ITTER
URING
DDRESS
HANNEL
LOBAL
I
00
01
02
03
04
05
07
06
08
09
0A
0B
0C
0D
0E
0F
E0
E1
E2
E3
E4
E5
E6
E7
E8
E9
EA
EB
S
NTERFACE
URING
IGNALS
H
H
H
H
H
H
H
H
H
H
H
I
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
..................................................................................................................................... 87
H
H
NTERFACE
I
I
NTERFACE
NTERFACE
T
T
B
B
B
B
B
B
B
B
B
B
B
M
B
B
B
B
B
B
B
B
B
B
B
B
B
M
B
B
B
B
P
S
IMING
IMING
C
I
D
IT
IT
IT
IT
IT
IT
IT
IT
IT
IT
IT
IT
IT
IT
IT
IT
IT
IT
IT
IT
IT
IT
IT
IT
IT
IT
NTERFACE
IT
IT
ICROPROCESSOR
EASUREMENTS
IGNALS
ROGRAMMED
P
(ADDR[7:0]) .......................................................................................................... 69
D
URVE
ESCRIPTION
D
D
D
D
D
D
D
D
D
D
I
D
D
D
D
D
D
D
D
D
D
D
D
D
D
ROGRAMMED
D
D
ESCRIPTION
D
D
NTERFACE
D
ESCRIPTION
ESCRIPTION
ESCRIPTION
ESCRIPTION
ESCRIPTION
ESCRIPTION
ESCRIPTION
ESCRIPTION
ESCRIPTION
ESCRIPTION
ESCRIPTION
ESCRIPTION
ESCRIPTION
ESCRIPTION
ESCRIPTION
ESCRIPTION
ESCRIPTION
ESCRIPTION
ESCRIPTION
ESCRIPTION
ESCRIPTION
ESCRIPTION
ESCRIPTION
ESCRIPTION
ESCRIPTION
ESCRIPTION
ESCRIPTION
ESCRIPTION
URING
S
S
S
Z
Z
Z
Z
IGNALS
..................................................................................................................... 59
PECIFICATIONS
PECIFICATIONS
32
64
64
M
64
D
T
S
.019UI
.023UI
ODE
URING
IMING
BITS
BITS
IGNALS COMMON TO BOTH
BITS
BITS
S
P
IGNALS
............................................................................................................ 70
ROGRAMMED
........................................................................................................... 61
T
I/O R
.......................................................................................................... 60
.......................................................................................................... 69
......................................................................................................... 54
......................................................................................................... 55
......................................................................................................... 56
IMING
........................................................................................................ 57
........................................................................................................ 58
........................................................................................................ 71
........................................................................................................ 73
........................................................................................................ 74
........................................................................................................ 74
........................................................................................................ 75
........................................................................................................ 76
........................................................................................................ 78
........................................................................................................ 78
........................................................................................................ 79
........................................................................................................ 79
........................................................................................................ 80
I/O R
S
....................................................................................................... 79
....................................................................................................... 79
....................................................................................................... 80
....................................................................................................... 80
....................................................................................................... 80
....................................................................................................... 81
....................................................................................................... 82
....................................................................................................... 82
....................................................................................................... 83
....................................................................................................... 83
....................................................................................................... 84
....................................................................................................... 85
....................................................................................................... 86
....................................................................................................... 86
....................................................................................................... 88
....................................................................................................... 89
....................................................................................................... 89
PP
P
III
PP
PECIFICATIONS
I
ROGRAMMED
NTERFACE
.................................................................................................. 58
.................................................................................................. 59
EAD AND
................................................................................................. 62
EAD AND
S
.............................................................................................. 64
.............................................................................................. 65
PECIFICATIONS
I/O R
W
B
W
LOCK
RITE
I/O R
EAD AND
.............................................................................. 68
RITE
O
I
........................................................................ 60
NTEL AND
EAD AND
O
PERATIONS
...................................................................... 67
PERATIONS
W
RITE
W
M
O
RITE
OTOROLA
W
PERATIONS
W
HEN
ITH
O
PERATIONS
ALE I
ALE HI
M
ODES
.................................. 68
S
N
GH
OT
.......................... 61
.......................... 67
......................... 65
T
IED
’HIGH’ ... 64
REV. 1.0.4