XRT83VSH28ES Exar, XRT83VSH28ES Datasheet - Page 26

no-image

XRT83VSH28ES

Manufacturer Part Number
XRT83VSH28ES
Description
Peripheral Drivers & Components - PCIs 8 CH E1 LIU SH (low cost version)
Manufacturer
Exar
Datasheet

Specifications of XRT83VSH28ES

Product Category
Peripheral Drivers & Components - PCIs
Rohs
yes
XRT83VSH28
8-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
To meet short haul requirements, the XRT83VSH28 can accept E1 signals that have been attenuated by 12dB
of flat loss. However, the XRT83VSH28 can tolerate cable loss and flat loss beyond the industry specifications.
The receive sensitivity in the short haul mode is approximately 1,800 feet without experiencing bit errors, LOF,
pattern synchronization, etc. Although data integrity is maintained, the RLOS function (if enabled) will report an
RLOS condition according to the receiver loss of signal section in this datasheet. The test configuration for
measuring the receive sensitivity is shown in
F
The interference margin for the XRT83VSH28 is -15db. The test configuration for measuring the interference
margin is shown in
F
The receive path detects RLOS, AIS, QRPD and FLS. These alarms can be individually masked to prevent the
alarm from triggering an interrupt. To enable interrupt generation, the Global Interrupt Enable (GIE) bit must be
set "High" in the appropriate global register. Any time a change in status occurs (it the alarms are enabled), the
interrupt pin will pull "Low" to indicate an alarm has occurred. Once the status registers have been read, the
INT pin will return "High". The status registers are Reset Upon Read (RUR). The interrupts are categorized in
a hierarchical process block.
N
2.2.1
2.2.2
2.2.3
IGURE
IGURE
OTE
: The interrupt pin is an open-drain output that requires a 10k external pull-up resistor.
8. T
9. T
Receive Sensitivity
Interference Margin
General Alarm Detection and Interrupt Generation
EST
EST
E1 = PRBS 2
C
C
W&G ANT20
ONFIGURATION FOR
ONFIGURATION FOR
Analyzer
Network
Figure
E1 = PRBS 2
E1 = 1,024kHz
W&G ANT20
15
Generator
Sinewave
Analyzer
Network
- 1
9.
15
Figure
Tx
Rx
- 1
Tx
Rx
Cable Loss
M
M
is a simplified block diagram of the interrupt generation process.
Cable Loss
EASURING
EASURING
Flat Loss
Figure
R
I
NTERFERENCE
ECEIVE
8.
Flat Loss
23
Rx
Tx
S
ENSITIVITY
Rx
XRT83VSH28
8-Channel LIU
Tx
M
ARGIN
Short Haul LIU
XRT83VSH28
8-Channel
External Loopback
External Loopback
REV. 2.0.0

Related parts for XRT83VSH28ES