PCF8576CT/S480/1,1 NXP Semiconductors, PCF8576CT/S480/1,1 Datasheet - Page 26
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PCF8576CT/S480/1,1
Manufacturer Part Number
PCF8576CT/S480/1,1
Description
LCD Drivers Universal LCD Driver Low Multiplex Rates
Manufacturer
NXP Semiconductors
Datasheet
1.PCF8576CTS48011.pdf
(61 pages)
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NXP Semiconductors
PCF8576C
Product data sheet
7.16.3 System configuration
7.16.4 Acknowledge
A device generating a message is a transmitter and a device receiving a message is the
receiver. The device that controls the message is the master and the devices which are
controlled by the master are the slaves. The system configuration is illustrated in
Figure
The number of data bytes transferred between the START and STOP conditions from
transmitter to receiver is unlimited. Each byte of eight bits is followed by an acknowledge
cycle.
Acknowledgement on the I
Fig 18. System configuration
•
•
•
•
A slave receiver, which is addressed, must generate an acknowledge after the
reception of each byte.
A master receiver must generate an acknowledge after the reception of each byte that
has been clocked out of the slave transmitter.
The device that acknowledges must pull-down the SDA line during the acknowledge
clock pulse, so that the SDA line is stable LOW during the HIGH period of the
acknowledge related clock pulse (set-up and hold times must be taken into
consideration).
A master receiver must signal an end of data to the transmitter by not generating an
acknowledge on the last byte that has been clocked out of the slave. In this event, the
transmitter must leave the data line HIGH to enable the master to generate a STOP
condition.
SCL
SDA
18.
TRANSMITTER/
RECEIVER
MASTER
All information provided in this document is subject to legal disclaimers.
Rev. 11 — 30 March 2012
RECEIVER
2
C-bus is illustrated in
SLAVE
TRANSMITTER/
RECEIVER
Universal LCD driver for low multiplex rates
SLAVE
Figure
TRANSMITTER
19.
MASTER
PCF8576C
TRANSMITTER/
© NXP B.V. 2012. All rights reserved.
RECEIVER
MASTER
mga807
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