PCF8576CT/S480/1,1 NXP Semiconductors, PCF8576CT/S480/1,1 Datasheet - Page 40

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PCF8576CT/S480/1,1

Manufacturer Part Number
PCF8576CT/S480/1,1
Description
LCD Drivers Universal LCD Driver Low Multiplex Rates
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
PCF8576C
Product data sheet
Fig 32. Synchronization of the cascade for the various PCF8576C drive modes
Excessive capacitive coupling between SCL or CLK and SYNC will cause erroneous
synchronization. If this is a problem you can increase the capacitance of the SYNC line (e.g. by an
external capacitor between SYNC and V
can be countered by an external pull-up resistor.
All information provided in this document is subject to legal disclaimers.
(1/2 bias)
(1/3 bias)
(1/3 bias)
(1/3 bias)
BP0
SYNC
SYNC
SYNC
SYNC
BP0
BP0
BP0
BP0
Rev. 11 — 30 March 2012
(b) 1:2 multiplex drive mode.
(c) 1:3 multiplex drive mode.
(d) 1:4 multiplex drive mode.
(a) static drive mode.
DD
T
Universal LCD driver for low multiplex rates
fr
.) Degradation of the positive edge of the SYNC pulse
=
f
1
fr
PCF8576C
mgl755
© NXP B.V. 2012. All rights reserved.
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