HCF4025BM1 STMicroelectronics, HCF4025BM1 Datasheet
HCF4025BM1
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HCF4025BM1 Summary of contents
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... September 2001 TRIPLE 3-INPUT NOR GATE = 50pF L = 25°C ORDER CODES A PACKAGE DIP SOP implementation supplement the existing family of CMOS gates. All inputs and outputs are buffered. Semiconductor with direct HCF4025B DIP SOP TUBE T & R HCF4025BEY HCF4025BM1 HCF4025M013TR of the NOR function and 1/7 ...
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HCF4025B INPUT EQUIVALENT CIRCUIT LOGIC DIAGRAM ABSOLUTE MAXIMUM RATINGS Symbol V Supply Voltage Input Voltage Input Current I P Power Dissipation per Package D Power Dissipation per Output Transistor T Operating Temperature op T ...
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DC SPECIFICATIONS Symbol Parameter V (V) I Quiescent Current 0/5 L 0/10 0/15 0/20 V High Level Output 0/5 OH Voltage 0/10 0/15 V Low Level Output 5/0 OL Voltage 10/0 15/0 V High Level Input IH Voltage V Low ...
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HCF4025B TEST CIRCUIT C = 50pF or equivalent (includes jig and probe capacitance 200K pulse generator (typically OUT WAVEFORM 1: PROPAGATION DELAY TIMES (f=1MHz; 50% duty cycle) 4/7 ...
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Plastic DIP-14 MECHANICAL DATA mm. DIM. MIN. a1 0. 15. 1.27 TYP MAX. MIN. 0.020 1.65 0.055 0.5 0.25 20 8.5 2.54 7.1 5.1 3.3 2.54 0.050 HCF4025B ...
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HCF4025B DIM. MIN 0 0. 8. 3.8 G 4 6/7 SO-14 MECHANICAL DATA mm. TYP MAX. 1.75 0.2 1.65 0.46 0.25 0.5 ...
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... No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied ...