SIP4282ADNP2-T1GE4 Vishay/Siliconix, SIP4282ADNP2-T1GE4 Datasheet - Page 8

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SIP4282ADNP2-T1GE4

Manufacturer Part Number
SIP4282ADNP2-T1GE4
Description
Power Switch ICs - Power Distribution 1.2A SLEW RATE CTRL LOAD SWITCH
Manufacturer
Vishay/Siliconix
Datasheet

Specifications of SIP4282ADNP2-T1GE4

Product Category
Power Switch ICs - Power Distribution
Rohs
yes
On Resistance (max)
520 mOhms
On Time (max)
20 us
Off Time (max)
4 us
Operating Supply Voltage
1.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Package / Case
TDFN-4
Maximum Power Dissipation
324 mW
Minimum Operating Temperature
- 40 C
Part # Aliases
SIP4282ADNP2GE4
SiP4282
Vishay Siliconix
DETAILED DESCRIPTION
The SiP4282 is a P-Channel MOSFET power switches
designed for high-side slew rate controlled load-switching
applications. Once turned on, the slew-rate control circuitry
is activated and current is ramped in a linear fashion until it
reaches the level required for the output load condition. This
is accomplished by first elevating the gate voltage of the
MOSFET up to its threshold voltage and then by linearly
increasing the gate voltage until the MOSFET becomes fully
enhanced. At this point, the gate voltage is then quickly
increased to the full input voltage to reduce R
MOSFET switch and minimize any associated power losses.
The SiP4282A-2 version has a modest 1 ms turn on slew rate
feature, which significantly reduces in-rush current at turned
on time and permits the load switch to be implemented with
a small input capacitor, or no input capacitor at all, saving
cost and space. All versions features a shutdown output dis-
charge circuit which is activated at shutdown (when the part
is disabled through the On/Off pin) and discharges the output
pin through a small internal resistor hence, turning off the
load.
For SiP4282-3, in instances where the input voltage falls
below 1.4 V (typically) the under voltage lock-out circuitry
protects the MOSFET switch from entering the saturation
region or operation by shutting down the chip.
APPLICATION INFORMATION
Input Capacitor
While a bypass capacitor on the input is not required, a 1 µF
or larger capacitor for C
applications. The bypass capacitor should be placed as
physically close as possible to the SiP4282 to be effective in
minimizing transients on the input. Ceramic capacitors are
recommended over tantalum because of their ability to
withstand input current surges from low impedance sources
such as batteries in portable devices.
Output Capacitor
A 0.1 µF capacitor or larger across V
recommended to insure proper slew operation. C
increased without limit to accommodate any load transient
condition with only minimal affect on the SiP4282 turn on
slew rate time. There are no ESR or capacitor type
requirement.
Enable
The On/Off pin is compatible with both TTL and CMOS logic
voltage levels.
Protection Against Reverse Voltage Condition
The P-channel MOSFET pass transistor has an intrinsic
diode that is reversed biased when the input voltage is
greater than the output voltage. Should V
this intrinsic diode will become forward biased and allow
excessive current to flow into the IC thru the V
potentially damage the IC device. Therefore extreme care
should be taken to prevent V
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?65740.
www.vishay.com
8
IN
is recommended in almost all
OUT
from exceeding V
OUT
OUT
DS(ON)
and GND is
exceed V
OUT
OUT
IN
pin and
may be
.
of the
IN
,
In conditions where V
parallel with the internal intrinsic diode is recommended to
protect the SiP4282.
Thermal Considerations
The SiP4282 is designed to maintain a constant output load
current. Due to physical limitations of the layout and
assembly of the device the maximum switch current is 1.2 A,
as stated in the Absolute Maximum Ratings table. However,
another limiting characteristic for the safe operating load
current is the thermal power dissipation of the package. To
obtain the highest power dissipation (and a thermal
resistance of 90 °C/W) the power pad of the device should
be connected to a heat sink on the printed circuit board.
The maximum power dissipation in any application is
dependant
T
for the SC-75 PPAK package, θ
ambient temperature, T
expressed as:
P
It then follows that, assuming an ambient temperature of
70 °C, the maximum power dissipation will be limited to about
610 mW.
So long as the load current is below the 1.2 A limit, the
maximum continuous switch current becomes a function two
things: the package power dissipation and the R
ambient temperature.
As an example let us calculate the worst case maximum load
current at T
occurs at an input voltage of 1.8 V and is equal to 480 mΩ.
The R
using the following formula
R
Where T
we have
R
= 551 mΩ
The maximum current limit is then determined by
I
which in case is 1.05 A. Under the stated input voltage
condition, if the 1.05 A current limit is exceeded the internal
die temperature will rise and eventually, possibly damage the
device.
LOAD
J(MAX)
DS(ON)
DS(ON)
(max.)
(max.)
DS(ON
= 125 °C, the junction-to-ambient thermal resistance
(at 70 °C) = R
(at 70 °C) = 480 mΩ x (1 + 0.0033 x (70 °C - 25 °C))
C
=
is 3300 ppm/°C. Continuing with the calculation
) at 70 °C can be extrapolated from this data
<
T
A
on
J
= 70 °C. The worst case R
(max.)
R
θ
P
J
the
DS
(max.)
-
A
(
ON
-
OUT
DS(ON)
T
maximum
)
A
A
exceeds V
, which may be formulaically
=
(at 25 °C) x (1 + T
125
S10-0671-Rev. E, 29-Mar-10
J-A
90
Document Number: 65740
-
junction
IN
T
= 90 °C/W, and the
A
a Schottky diode in
DS(ON)
temperature,
DS(ON)
C
x ΔT)
at 25 °C
at the

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