P5010NXN1QMB Freescale Semiconductor, P5010NXN1QMB Datasheet - Page 151

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P5010NXN1QMB

Manufacturer Part Number
P5010NXN1QMB
Description
Processors - Application Specialized P5010 Ext Tmp NoEnc 1600/1200 r2.0
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of P5010NXN1QMB

Rohs
yes
3.6.2
Correct operation of the Aurora interface requires configuration of a group of system control pins as demonstrated in
and
conditions as most have asynchronous behavior and spurious assertion gives unpredictable results.
Freescale recommends that the Aurora 22 pin duplex connector be designed into the system as shown in
duplex connector be designed into the system as shown in
If the Aurora interface is not used, Freescale recommends the legacy COP header be designed into the system as described in
Section 3.6.1.1, “Termination of Unused
Freescale Semiconductor
Figure
61. Care must be taken to ensure that these pins are maintained at a valid negated state under normal operating
Aurora Configuration Signals
P5020/P5010 QorIQ Integrated Processor Hardware Specifications, Rev. 0
Figure 60. Aurora 22 Pin Connector Duplex Pinout
Signals.”
TX0+
TX1+
RX0+
RX1+
GND
TX0-
TX1-
RX0-
GND
GND
RX1-
19
11
13
15
21
17
1
1
3
5
7
9
Figure
22
14
18
20
10
12
16
2
4
6
8
63.
VIO (VSense)
TCK
TMS
TDI
TDO
TRST
Vendor I/O 0
Vendor I/O 2
RESET
Vendor I/O 1
Vendor I/O 3
Hardware Design Considerations
Figure 62
or the 70 pin
Figure 60
151

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