P5010NXN1QMB Freescale Semiconductor, P5010NXN1QMB Datasheet - Page 7

• Manufacturer Part Number: P5010NXN1QMB
• Description: Processors - Application Specialized P5010 Ext Tmp NoEnc 1600/1200 r2.0
• Manufacturer: Freescale Semiconductor

Specifications of P5010NXN1QMB

• Rohs: yes

Freescale Semiconductor
VDD_CA
VDD_CA
VDD_PL
VDD_PL
MVREF
AVDD_
[C19]
GND
GND
GND
[178]
GND
[177]
GND
[176]
GND
[175]
DDR
LCS
LAD
[18]
[12]
[28]
[29]
[30]
[15]
[66]
[91]
19
NC
LA
LA
[0]
LA
[6]
[4]
VDD_CA
VDD_CA
VDD_CA
VDD_PL
AVDD_
BV DD
BV DD
[C20]
GND
GND
GND
[179]
GND
[180]
GND
[181]
CC1
LCS
LCS
[16]
[25]
[26]
[27]
[22]
[28]
20
NC
LA
LA
LA
[1]
[2]
[3]
[8]
[7]
[2]
[1]
VDD_PL
VDD_CA
VDD_CA
VDD_PL
ANODE
TEMP_
TEMP_
RSRV
CATH-
[A21]
GND
[190]
GND
GND
GND
[193]
GND
[192]
GND
[191]
ODE
LCS
21
[21]
[22]
[29]
[23]
[33]
[24]
[67]
[75]
[3]
LA
LA
LA
LA
[8]
[3]
VDD_PL
VDD_PL
VDD_PL
VDD_PL
LBCTL
BV DD
BV DD
GND
GND
GND
GND
[200]
GND
[199]
GND
[198]
LCS
LAD
LAD
22
[21]
[17]
[19]
[11]
[20]
[10]
[19]
[80]
[83]
[84]
[30]
LA
LA
P5020/P5010 QorIQ Integrated Processor Hardware Specifications, Rev. 0
[4]
[6]
[2]
Figure 5. P5020—1295 BGA Ball Map Diagram (Detail View B)
VDD_PL
VDD_PL
VDD_PL
VDD_PL
LCLK
LALE
GND
GND
GND
[208]
GND
[207]
GND
[206]
GND
[205]
LCS
LAD
LAD
LAD
LDP
23
[26]
[18]
[20]
[68]
[71]
[72]
[33]
[5]
[1]
[9]
[8]
[7]
LA
[1]
VDD_PL
VDD_PL
VDD_PL
VDD_PL
BV DD
BV DD
BV DD
LCLK
LWE
LWE
GND
[209]
GND
[210]
GND
[211]
GND
[212]
LCS
LAD
LAD
LDP
24
[38]
[39]
[40]
[41]
[1]
[1]
[0]
[0]
[5]
[6]
[6]
[5]
[0]
[7]
VDD_PL
VDD_PL
VDD_PL
VDD_PL
RSRV
LGPL
LGPL
LGPL
LGPL
[A25]
GND
GND
[225]
GND
[224]
GND
[223]
GND
LAD
LAD
[17]
[16]
[30]
[69]
[45]
[46]
[47]
[46]
25
[0]
[4]
[2]
[1]
[4]
LA
[3]
LA
VDD_PL
VDD_PL
VDD_PL
VDD_PL
BV DD
LGPL
LGPL
[C26]
GND
[B26]
LAD
GND
[112]
GND
[111]
GND
[110]
[27]
LCS
LAD
LAD
LAD
26
[23]
NC
NC
[5]
[4]
[7]
[3]
[2]
[0]
[1]
[1]
[2]
[3]
[4]
SD_IMP_
VDD_PL
VDD_PL
VDD_PL
CAL_RX
GND_PL
VDD_PL
SENSE-
SENSE-
DETAIL B
[A27]
[C27]
[D27]
[E27]
[G27]
[H27]
GND
GND
GND
GND
[221]
GND
[226]
GND
[227]
[28]
[27]
[34]
[51]
[32]
[52]
27
NC
NC
NC
NC
NC
NC
[2]
[2]
SD_RX
SD_RX
SD_TX
SD_TX
SGND
SV DD
XGND
XV DD
XV DD
XGND
RSRV
RSRV
RSRV
RSRV
[M28]
[P28]
[R28]
[U28]
[L28]
[N28]
[T28]
[V28]
28
[10]
[10]
[15]
[20]
NC
NC
NC
NC
[1]
[9]
[0]
[0]
[0]
[0]
SD_RX
SD_RX
SD_TX
SD_TX
SGND
XGND
XGND
XGND
XGND
XGND
XGND
XGND
XGND
XGND
SV DD
XV DD
XV DD
XV DD
[12]
[15]
[13]
[15]
[18]
[21]
[22]
[21]
[25]
[28]
[25]
[27]
[32]
[34]
29
[1]
[1]
[1]
[1]
SD_RX
SD_RX
SD_TX
SD_TX
SD_TX
SV DD
SGND
XGND
XV DD
XV DD
XV DD
XV DD
XGND
XGND
XV DD
XGND
XV DD
XV DD
30
[10]
[11]
[11]
[16]
[18]
[19]
[24]
[26]
[23]
[30]
[11]
[29]
[30]
[2]
[2]
[1]
[2]
[2]
SD_RX
SD_RX
SD_TX
SD_TX
SD_TX
SD_TX
SD_TX
SD_TX
SGND
XGND
XGND
XGND
XGND
SV DD
XV DD
XV DD
XV DD
XV DD
[12]
[14]
[14]
[13]
[19]
[20]
[22]
[10]
[26]
[11]
[33]
[35]
31
[3]
[3]
[3]
[3]
[7]
[8]
SD_TX
SD_TX
SD_TX
Pin Assignments and Reset States
SGND
XGND
XGND
XGND
XGND
XGND
SV DD
XV DD
XV DD
XV DD
XV DD
XV DD
RSRV
RSRV
RSRV
[C32]
[U32]
[D32]
[10]
32
[12]
[12]
[16]
[17]
[23]
[27]
[10]
[31]
[28]
[31]
[2]
[8]
[7]
[8]
AGND_
AVDD_
SRDS1
SRDS1
SD_TX
SD_TX
SD_TX
SD_RX
SD_TX
SD_RX
SGND
XGND
SGND
SGND
XV DD
XV DD
SV DD
XV DD
SV DD
REF_
CLK2
SD_
[13]
[14]
[20]
[22]
[24]
[24]
[11]
[26]
33
[9]
[9]
[5]
[5]
[6]
[8]
[9]
SD_RX
SD_RX
SD_TX
SD_TX
SD_TX
SD_TX
SGND
SGND
XGND
SGND
XGND
SGND
SV DD
SV DD
SV DD
SV DD
SV DD
REF_
CLK2
SD_
34
[11]
[13]
[17]
[17]
[17]
[20]
[22]
[29]
[24]
[11]
[27]
[2]
[4]
[4]
[6]
[8]
[9]
SD_RX
SD_RX
SD_RX
SD_RX
SD_RX
SGND
SGND
SGND
SGND
SGND
RSRV
SV DD
SV DD
SV DD
SV DD
SV DD
REF_
CLK1
REF_
CLK1
[U35]
SD_
SD_
[14]
[15]
[16]
[18]
[19]
[21]
[23]
[10]
[25]
[26]
[27]
35
[5]
[6]
[7]
[9]
SD_RX
SD_RX
SD_RX
SD_RX
SD_RX
SD_RX
SD_RX
AGND_
SRDS2
AVDD_
SRDS2
SGND
SGND
SGND
SGND
SGND
SV DD
SV DD
SV DD
SV DD
36
[11]
[16]
[18]
[19]
[21]
[23]
[10]
[25]
[28]
[3]
[4]
[4]
[5]
[6]
[7]
[9]
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
V
7