MCIMX6D4AVT08AC Freescale Semiconductor, MCIMX6D4AVT08AC Datasheet - Page 15

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MCIMX6D4AVT08AC

Manufacturer Part Number
MCIMX6D4AVT08AC
Description
Processors - Application Specialized i.MX6D AUTO
Manufacturer
Freescale Semiconductor
Type
Multimedia Applicationsr
Datasheet

Specifications of MCIMX6D4AVT08AC

Rohs
yes
Core
ARM Cortex A9
Processor Series
i.MX6
Data Bus Width
32 bit
Operating Supply Voltage
1.05 V to 1.5 V
Memory Type
L1/L2 Cache, ROM, SRAM

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Freescale Semiconductor
TEMPMON
Mnemonic
USBOH3A
UART-1
UART-2
UART-3
UART-4
UART-5
TZASC
Block
SSI-1
SSI-2
SSI-3
I2S/SSI/AC97
Interface
Temperature Monitor System
Trust-Zone Address
Space Controller
UART Interface
USB 2.0 High Speed
OTG and 3x HS
Hosts
i.MX 6Dual/6Quad Automotive and Infotainment Applications Processors, Rev. 2
Block Name
Table 2. i.MX 6Dual/6Quad Modules List (continued)
Connectivity
Peripherals
Control
Peripherals
Security
Connectivity
Peripherals
Connectivity
Peripherals
Subsystem
The SSI is a full-duplex synchronous interface, which is used on the
processor to provide connectivity with off-chip audio peripherals. The SSI
supports a wide variety of protocols (SSI normal, SSI network, I2S, and
AC-97), bit depths (up to 24 bits per word), and clock / frame sync options.
The SSI has two pairs of 8x24 FIFOs and hardware support for an
external DMA controller in order to minimize its impact on system
performance. The second pair of FIFOs provides hardware interleaving
of a second audio stream that reduces CPU overhead in use cases where
two time slots are being used simultaneously.
The temperature monitor/sensor IP module for detecting high
temperature conditions. The temperature read out does not reflect case
or ambient temperature. It reflects the temperature in proximity of the
sensor location on the die. Temperature distribution may not be uniformly
distributed; therefore, the read out value may not be the reflection of the
temperature value for the entire die.
The TZASC (TZC-380 by ARM) provides security address region control
functions required for intended application. It is used on the path to the
DRAM controller.
Each of the UARTv2 modules support the following serial data
transmit/receive protocols and configurations:
USBOH3 contains:
• 7- or 8-bit data words, 1 or 2 stop bits, programmable parity (even, odd
• Programmable baud rates up to 4 MHz. This is a higher max baud rate
• 32-byte FIFO on Tx and 32 half-word FIFO on Rx supporting
• IrDA 1.0 support (up to SIR speed of 115200 bps)
• Option to operate as 8-pins full UART, DCE, or DTE
• One high-speed OTG module with integrated HS USB PHY
• One high-speed Host module with integrated HS USB PHY
• Two identical high-speed Host modules connected to HSIC USB ports.
or none)
relative to the 1.875 MHz, which is stated by the TIA/EIA-232-F
standard and the i.MX31 UART modules.
auto-baud
Brief Description
Modules List
15

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