MT48LC2M32B2TG-7:G TR Micron Technology Inc, MT48LC2M32B2TG-7:G TR Datasheet - Page 52
![IC SDRAM 64MBIT 143MHZ 86TSOP](/photos/7/22/72264/557-86-tsop_sml.jpg)
MT48LC2M32B2TG-7:G TR
Manufacturer Part Number
MT48LC2M32B2TG-7:G TR
Description
IC SDRAM 64MBIT 143MHZ 86TSOP
Manufacturer
Micron Technology Inc
Type
SDRAMr
Datasheet
1.MT48LC2M32B2P-6G_TR.pdf
(69 pages)
Specifications of MT48LC2M32B2TG-7:G TR
Format - Memory
RAM
Memory Type
SDRAM
Memory Size
64M (2Mx32)
Speed
143MHz
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
86-TSOP
Package
86TSOP-II
Density
64 Mb
Address Bus Width
13 Bit
Operating Supply Voltage
3.3 V
Maximum Clock Rate
143 MHz
Maximum Random Access Time
17|8|5.5 ns
Organization
2Mx32
Address Bus
13b
Access Time (max)
17/8/5.5ns
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
160mA
Pin Count
86
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
557-1076-2
Figure 34:
PDF: 09005aef811ce1fe/Source: 09005aef811ce1d5
64MSDRAMx32_2.fm - Rev. J 12/08 EN
Power-Down Mode
COMMAND
Precharge all
BA0, BA1
DQM 0-3
active banks
A0-A9
CLK
CKE
A10
DQ
Note:
High-Z
t CKS
t CMS
t AS
SINGLE BANK
PRECHARGE
ALL BANKS
BANK(S)
T0
t CMH
t CKH
t AH
Violating refresh requirements during power-down may result in a loss of data.
Two clock cycles
All banks idle, enter
power-down mode
t CK
T1
NOP
t CKS
t CL
T2
NOP
Input buffers gated off while in
power-down mode
t CH
52
Exit power-down mode
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Micron Technology, Inc., reserves the right to change products or specifications without notice.
t CKS
Tn + 1
NOP
All banks idle
©2001 Micron Technology, Inc. All rights reserved.
Tn + 2
ACTIVE
ROW
ROW
BANK
64Mb: x32 SDRAM
DON’T CARE
UNDEFINED
Timing Diagrams