C8051F589-IMR Silicon Labs, C8051F589-IMR Datasheet - Page 309
C8051F589-IMR
Manufacturer Part Number
C8051F589-IMR
Description
8-bit Microcontrollers - MCU 50MIPS 128kB 8kB SPI
Manufacturer
Silicon Labs
Datasheet
1.C8051F585-IQR.pdf
(356 pages)
Specifications of C8051F589-IMR
Rohs
yes
Core
8051
Data Bus Width
8 bit
Processor Series
C8051
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SFR Definition 27.19. TMRnCF: Timer 4 and 5 Configuration
TMR4CF SFR Address = 0xC9; TMR5CF SFR Address = 0x96; SFR Page = 0x10;
Name
Reset
Bit
7:5
4:3
Type
2
1
0
Bit
Reserved
TnM[1:0]
DCENn
Name
TOGn
TnOE
R/W
7
0
Must Write 000b.
Timer 4 and 5 Clock Mode Select Bits.
00: Timer clock is SYSCLK / 12.
01: Timer clock is SYSCLK.
10: Timer clock is External Clock / 8 (synchronized to system clock).
11: Timer clock is SYSCLK / 2.
Timer 4 and 5 Toggle Output State.
When Timer 4 or 5 are used to toggle a port pin, this bit can be used to read the state
of the output or can be written to force the state of the output.
Timer 4 and 5 Output Enable.
This bit enables the timer to output a 50% duty cycle output to the timer’s assigned
external port pin.
0: Output of toggle mode not available at Timer’s assigned port pin.
1: Output of toggle mode available at Timer’s assigned port pin.
Decrement Enable.
This bit enables the timer to count up or down as determined by the state of TnEX.
0: Timer will count up, regardless of the state of TnEX.
1: Timer will count up or down, depending on the state of TnEX as follows:
If TnEx = 0, the timer counts down.
If TnEx = 1, the timer counts up.
The Timer is configured for Square Wave Output as follows:
CPRLn = 0.
CTn = 0.
TnOE = 1.
Load TMRnCAPH:TMRnCAPL.
R/W
6
0
R/W
5
0
R/W
Rev. 1.2
4
0
TnM[1:0]
Function
R/W
3
0
C8051F58x/F59x
TOGn
R/W
2
0
TnOE
R
1
0
DCENn
R/W
0
0
309
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