C8051F509-IMR Silicon Labs, C8051F509-IMR Datasheet - Page 197

• Manufacturer Part Number: C8051F509-IMR
• Description: 8-bit Microcontrollers - MCU 50 MIPS 64 kB 4 kB SPI UART I2C
• Manufacturer: Silicon Labs

Specifications of C8051F509-IMR

• Rohs: yes
• Core: 8051
• Data Bus Width: 8 bit
• Processor Series: C8051

SFR Definition 20.23. P2SKIP: Port 2 Skip
SFR Address = 0xD6; SFR Page = 0x0F
SFR Definition 20.24. P3: Port 3
SFR Address = 0xB0; SFR Page = All Pages; Bit-Addressable
Note: Port P3.1–P3.7 are only available on the 48-pin and 40-pin packages.
Reset
Reset
Name
Name
Bit
7:0
Bit
7:0
Type
Type
Bit
Bit
P2SKIP[7:0]
P3[7:0]
Name
Name
7
0
7
1
Port 3 Data.
Sets the Port latch logic
value or reads the Port pin
logic state in Port cells con-
figured for digital I/O.
Port 2 Crossbar Skip Enable Bits.
These bits select Port 2 pins to be skipped by the Crossbar Decoder. Port pins
used for analog, special functions or GPIO should be skipped by the Crossbar.
0: Corresponding P2.n pin is not skipped by the Crossbar.
1: Corresponding P2.n pin is skipped by the Crossbar.
0
1
6
6
Description
5
0
5
1
Rev. 1.2
0: Set output latch to logic
LOW.
1: Set output latch to logic
HIGH.
4
0
4
1
P2SKIP[7:0]
P3[7:0]
R/W
R/W
Function
Write
3
0
3
1
C8051F50x/F51x
2
0
2
1
0: P3.n Port pin is logic
LOW.
1: P3.n Port pin is logic
HIGH.
1
0
1
1
Read
0
0
0
1
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