W9412G6JH-5 Winbond Electronics, W9412G6JH-5 Datasheet - Page 25

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W9412G6JH-5

Manufacturer Part Number
W9412G6JH-5
Description
IC DDR-400 SDRAM 128MB 66TSSOPII
Manufacturer
Winbond Electronics
Datasheet

Specifications of W9412G6JH-5

Format - Memory
RAM
Memory Type
DDR SDRAM
Memory Size
128M (8Mx16)
Speed
200MHz
Interface
Parallel
Voltage - Supply
2.3 V ~ 2.7 V
Operating Temperature
0°C ~ 70°C
Package / Case
66-TSOPII
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
W9412G6JH-5
Manufacturer:
MURATA
Quantity:
640 000
Part Number:
W9412G6JH-5
Manufacturer:
WINBOND/华邦
Quantity:
20 000
9.5
I
SYM.
I
I
I
I
I
DD4W
DD2N
DD3N
DD4R
I
I
DD2P
DD3P
I
I
I
DD0
DD1
DD5
DD6
DD7
DC Characteristics
Operating current: One Bank Active-Precharge;
t
DQ, DM and DQS inputs changing once per clock cycle;
Address and control inputs changing once every two clock cycles
Operating current: One Bank Active-Read-Precharge;
Burst = 4; t
Address and control inputs changing once per clock cycle.
Precharge Power Down standby current:
All Banks Idle; Power down mode;
CKE < V
Idle standby current:
Address and other control inputs changing once per clock cycle;
Vin > V
Active Power Down standby current:
One Bank Active; Power down mode;
CKE < V
Vin = V
Active standby current:
t
DQ, DM and DQS inputs changing twice per clock cycle;
Address and other control inputs changing once per clock cycle
Operating current:
Burst = 2; Reads; Continuous burst; One Bank Active;
Address and control inputs changing once per clock cycle;
CL=2; t
Operating current:
Burst = 2; Write; Continuous burst; One Bank Active;
Address and control inputs changing once per clock cycle;
CL = 2; t
DQ, DM and DQS inputs changing twice per clock cycle
Auto Refresh current: t
Self Refresh current: CKE < 0.2V
Random Read current: 4 Banks Active Read with activate every 20nS,
Auto-Precharge Read every 20 nS;
Burst = 4; t
DQ, DM and DQS inputs changing twice per clock cycle;
Address changing once per clock cycle
CS
CS
RC
RC
= t
= t
> V
> V
RC
RAS
IH
REF
CK
IH
IH
CK
IL
IL
min; t
min or Vin < V
max; t
= t
max; t
min; All Banks Idle; CKE > V
max; t
min; CKE > V
RC
RCD
for DQ, DQS and DM
= t
CK
= t
CK
CK
= 3; I
min; I
CK
RC
CK
CK
min;
= t
= t
min; CL = 3; t
= t
= t
CK
OUT
OUT
CK
CK
CK
RC
min;
IL
= 0mA;
IH
min;
min; Vin = V
min;
= 0mA
= t
max for DQ, DQS and DM
min; One Bank Active-Precharge;
PARAMETER
RFC
min
CK
;
external clock on; t
= t
REF
CK
IH
min; I
for DQ, DQS and DM
min; t
OUT
- 25 -
CK
= t
= 0 mA;
CK
CK
min;
= t
CK
min
Publication Release Date: Apr. 02, 2010
140
135
170
-4
60
75
25
15
35
75
5
2
MAX.
W9412G6JH
120
115
150
55
65
20
10
30
70
-5
5
2
UNIT NOTES
mA
Revision A01
7, 9
7, 9
7
7
7
7
7

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