CY7C138-25JXI Cypress Semiconductor Corp, CY7C138-25JXI Datasheet - Page 12

• Manufacturer Part Number: CY7C138-25JXI
• Description: IC SRAM 32KBIT 25NS 68PLCC
• Manufacturer: Cypress Semiconductor Corp
• Type: Asynchronousr

Specifications of CY7C138-25JXI

• Memory Size: 32K (4K x 8)
• Package / Case: 68-PLCC
• Format - Memory: RAM
• Memory Type: SRAM - Dual Port, Asynchronous
• Speed: 25ns
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Access Time: 25 ns
• Maximum Clock Frequency: 1 MHz
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Maximum Operating Current: 180 mA
• Organization: 4 K x 8
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Number Of Ports: 2
• Operating Supply Voltage: 5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Switching Waveforms
Note
Document #: 38-06037 Rev. *G
33. If t
CE
CE
Right Address Valid First:
Left Address Valid First:
Address
Address
PS
R
L
Address
Address
Address
Address
Valid First:
Valid First:
is violated, the busy signal will be asserted on one side or the other, but there is no guarantee on which side BUSY will be asserted.
BUSY
BUSY
BUSY
BUSY
CE
CE
CE
CE
L,R
L,R
R
R
R
R
L
L
L
R
R
L
L
L
Figure 13. Busy Timing Diagram No. 2 (Address Arbitration)
(continued)
Figure 12. Busy Timing Diagram No. 1 (CE Arbitration)
t
t
PS
PS
Address Match
Address Match
t
t
RC
RC
or t
or t
t
t
PS
PS
WC
WC
t
t
BLA
BLA
Address Match
Address Match
t
t
BLC
BLC
Address Mismatch
Address Mismatch
t
t
BHA
BHA
t
t
BHC
BHC
[33]
[33]
CY7C138
Page 12 of 21
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