CY7C138-25JXI Cypress Semiconductor Corp, CY7C138-25JXI Datasheet - Page 8

• Manufacturer Part Number: CY7C138-25JXI
• Description: IC SRAM 32KBIT 25NS 68PLCC
• Manufacturer: Cypress Semiconductor Corp
• Type: Asynchronousr

Specifications of CY7C138-25JXI

• Memory Size: 32K (4K x 8)
• Package / Case: 68-PLCC
• Format - Memory: RAM
• Memory Type: SRAM - Dual Port, Asynchronous
• Speed: 25ns
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Access Time: 25 ns
• Maximum Clock Frequency: 1 MHz
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Maximum Operating Current: 180 mA
• Organization: 4 K x 8
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Number Of Ports: 2
• Operating Supply Voltage: 5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Switching Waveforms
Document #: 38-06037 Rev. *G
Notes
18. R/W is HIGH for read cycle.
19. Device is continuously selected CE = LOW and OE = LOW. This waveform cannot be used for semaphore reads.
20. Address valid prior to or coincident with CE transition LOW.
21. CE
22. BUSY = HIGH for the writing port.
23. CE
Address
Address
Data
L
L
SEM or CE
Data Out
Data
= L, SEM = H when accessing RAM. CE = H, SEM = L when accessing semaphores.
= CE
R/W
OUTL
R
INR
I
= LOW.
OE
I
CC
SB
R
R
L
t
PU
Figure 4. Read Cycle No. 2 (Either Port CE/OE Access)
(continued)
Figure 5. Read Timing with Port-to-Port Delay (M/S = L)
t
LZCE
t
LZOE
t
ACE
t
DOE
Match
Match
t
WC
t
PWE
t
WDD
VALID
Data Valid
t
SD
[18, 19, 20, 21]
t
DDD
t
HZOE
[22, 23]
t
HD
t
HZCE
t
PD
Valid
CY7C138
Page 8 of 21
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