CY7C1393BV18-167BZC Cypress Semiconductor Corp, CY7C1393BV18-167BZC Datasheet - Page 7

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CY7C1393BV18-167BZC

Manufacturer Part Number
CY7C1393BV18-167BZC
Description
IC SRAM 18MBIT 167MHZ 165LFBGA
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C1393BV18-167BZC

Format - Memory
RAM
Memory Type
SRAM - Synchronous, DDR II
Memory Size
18M (1M x 18)
Speed
167MHz
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.9 V
Operating Temperature
0°C ~ 70°C
Package / Case
165-LFBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C1393BV18-167BZC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Pin Definitions
Document #: 38-05623 Rev. *D
CQ
CQ
ZQ
DOFF
TDO
TCK
TDI
TMS
NC
NC/36M
NC/72M
NC/144M
NC/288M
V
V
V
V
Pin Name
REF
DD
SS
DDQ
Power Supply Power Supply Inputs to the Core of the Device.
Power Supply Power Supply Inputs for the Outputs of the Device.
Echo Clock
Echo Clock
Reference
Ground
Output
Input-
Input
Input
Input
Input
Input
N/A
N/A
N/A
N/A
N/A
IO
(continued)
CQ is Referenced with Respect to C. This is a free-running clock and is synchronized to the input clock
for output data (C) of the DDR-II. In the single clock mode, CQ is generated with respect to K. The timings
for the echo clocks is shown in the
CQ is Referenced with Respect to C. This is a free-running clock and is synchronized to the input clock
for output data (C) of the DDR-II. In the single clock mode, CQ is generated with respect to K. The timings
for the echo clocks is shown in the
Output Impedance Matching Input. This input is used to tune the device outputs to the system data bus
impedance. CQ, CQ, and Q
between ZQ and ground. Alternatively, this pin can be connected directly to V
minimum impedance mode. This pin cannot be connected directly to GND or left unconnected.
DLL Turn Off − Active LOW. Connecting this pin to ground turns off the DLL inside the device. The timing
in the DLL turned off operation differs from those listed in this data sheet.
TDO for JTAG.
TCK Pin for JTAG.
TDI Pin for JTAG.
TMS Pin for JTAG.
Not Connected to the Die. Can be tied to any voltage level.
Not Connected to the Die. Can be tied to any voltage level.
Not Connected to the Die. Can be tied to any voltage level.
Not Connected to the Die. Can be tied to any voltage level.
Not Connected to the Die. Can be tied to any voltage level.
Reference Voltage Input. Static input used to set the reference level for HSTL inputs, Outputs, and AC
measurement points.
Ground for the Device.
[x:0]
output impedance are set to 0.2 x RQ, where RQ is a resistor connected
Switching Characteristics
Switching Characteristics
Pin Description
CY7C1392BV18, CY7C1992BV18
CY7C1393BV18, CY7C1394BV18
on page 23.
on page 23.
DDQ
, which enables the
Page 7 of 31
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