C8051F131R Silicon Labs, C8051F131R Datasheet - Page 108

• Manufacturer Part Number: C8051F131R
• Description: 8-bit Microcontrollers - MCU 128kB 100MIPS 8448B RAM
• Manufacturer: Silicon Labs

Specifications of C8051F131R

• Product Category: 8-bit Microcontrollers - MCU
• Core: 8051
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 100 MHz
• Program Memory Size: 128 KB
• Data Ram Size: 8.25 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 2.7 V to 3.6 V
• Package / Case: TQFP-64
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 9
• Data Rom Size: 64 KB
• Interface Type: I2C, SMBus, SPI, UART
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 32
• Number Of Timers: 16 bit
• Processor Series: C8051
• Program Memory Type: Flash
• Factory Pack Quantity: 500
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 3 V

C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
108
Bit7:
Bits6–5: UNUSED. Read = 00b; Write = don’t care.
Bits4–3: DAC0MD1–0: DAC0 Mode Bits.
Bits2–0: DAC0DF2–0: DAC0 Data Format Bits:
DAC0EN
MSB
R/W
Bit7
MSB
DAC0EN: DAC0 Enable Bit.
0: DAC0 Disabled. DAC0 Output pin is disabled; DAC0 is in low-power shutdown mode.
1: DAC0 Enabled. DAC0 Output pin is active; DAC0 is operational.
00: DAC output updates occur on a write to DAC0H.
01: DAC output updates occur on Timer 3 overflow.
10: DAC output updates occur on Timer 4 overflow.
11: DAC output updates occur on Timer 2 overflow.
000:
001:
010:
011:
1xx:
MSB
R/W
Bit6
-
The most significant nibble of the DAC0 Data Word is in DAC0H[3:0], while the least
significant byte is in DAC0L.
The most significant 5-bits of the DAC0 Data Word is in DAC0H[4:0], while the least
significant 7-bits are in DAC0L[7:1].
The most significant 6-bits of the DAC0 Data Word is in DAC0H[5:0], while the least
significant 6-bits are in DAC0L[7:2].
The most significant 7-bits of the DAC0 Data Word is in DAC0H[6:0], while the least
significant 5-bits are in DAC0L[7:3].
The most significant 8-bits of the DAC0 Data Word is in DAC0H[7:0], while the least
significant 4-bits are in DAC0L[7:4].
MSB
DAC0H
DAC0H
DAC0H
DAC0H
DAC0H
SFR Definition 8.3. DAC0CN: DAC0 Control
R/W
MSB
Bit5
-
DAC0MD1 DAC0MD0 DAC0DF2 DAC0DF1 DAC0DF0 00000000
R/W
Bit4
Rev. 1.4
R/W
Bit3
R/W
Bit2
LSB
R/W
Bit1
DAC0L
DAC0L
DAC0L
DAC0L
DAC0L
LSB
SFR Address:
SFR Page:
R/W
Bit0
LSB
LSB
0xD4
0
Reset Value
LSB