C8051F131R Silicon Labs, C8051F131R Datasheet - Page 200

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C8051F131R

Manufacturer Part Number
C8051F131R
Description
8-bit Microcontrollers - MCU 128kB 100MIPS 8448B RAM
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F131R

Product Category
8-bit Microcontrollers - MCU
Core
8051
Data Bus Width
8 bit
Maximum Clock Frequency
100 MHz
Program Memory Size
128 KB
Data Ram Size
8.25 KB
On-chip Adc
Yes
Operating Supply Voltage
2.7 V to 3.6 V
Package / Case
TQFP-64
Mounting Style
SMD/SMT
A/d Bit Size
10 bit
A/d Channels Available
9
Data Rom Size
64 KB
Interface Type
I2C, SMBus, SPI, UART
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
32
Number Of Timers
16 bit
Processor Series
C8051
Program Memory Type
Flash
Factory Pack Quantity
500
Supply Voltage - Max
3.6 V
Supply Voltage - Min
3 V
C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
15.1.1. Non-volatile Data Storage
The Flash memory can be used for non-volatile data storage as well as program code. This allows data
such as calibration coefficients to be calculated and stored at run time. Data is written and erased using the
MOVX write instruction (as described in
instruction. The COBANK bits in register PSBANK (SFR Definition 11.1) control which portion of the Flash
memory is targeted by writes and erases of addresses above 0x07FFF. For devices with 64 kB of Flash.
the COBANK bits should always remain set to ‘01’ to ensure that Flash write, erase, and read operations
are valid.
Two additional 128-byte sectors (256 bytes total) of Flash memory are included for non-volatile data stor-
age. The smaller sector size makes them particularly well suited as general purpose, non-volatile scratch-
pad memory. Even though Flash memory can be written a single byte at a time, an entire sector must be
erased first. In order to change a single byte of a multi-byte data set, the data must be moved to temporary
storage. The 128-byte sector-size facilitates updating data without wasting program memory or RAM
space. The 128-byte sectors are double-mapped over the normal Flash memory for MOVC reads and
MOVX writes only; their addresses range from 0x00 to 0x7F and from 0x80 to 0xFF (see Figure 15.2). To
access the 128-byte sectors, the SFLE bit in PSCTL must be set to logic 1. Code execution from the 128-
byte Scratchpad areas is not permitted. The 128-byte sectors can be erased individually, or both at the
same time. To erase both sectors simultaneously, the address 0x0400 should be targeted during the erase
operation with SFLE set to ‘1’. See Figure 15.1 for the memory map under different COBANK and SFLE
settings.
200
V
Flash Size
Flash Size
Endurance
Erase Cycle Time
Write Cycle Time
Notes:
DD
1. Includes 256-byte Scratch Pad Area
2. 1024 Bytes at location 0x1FC00 to 0x1FFFF are reserved.
= 2.7 to 3.6 V; –40 to +85 °C
Parameter
1
1
C8051F12x and C8051F130/1
C8051F132/3
Table 15.1. Flash Electrical Characteristics
Conditions
Section 15.1.2
Rev. 1.4
and
Section 15.1.3
Min
20k
10
40
131328
65792
100k
Typ
12
50
) and read using the MOVC
2
Max
14
60
Erase/Write
Units
Bytes
Bytes
ms
µs

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