BR93L66RF-WE2 Rohm Semiconductor, BR93L66RF-WE2 Datasheet - Page 3

• Manufacturer Part Number: BR93L66RF-WE2
• Description: IC EEPROM 4KBIT 2MHZ 8SOP
• Manufacturer: Rohm Semiconductor

Specifications of BR93L66RF-WE2

• Memory Size: 4K (256 x 16)
• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Speed: 2MHz
• Interface: Microwire, 3-Wire Serial
• Voltage - Supply: 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOP
• Clock Frequency: 2MHz
• Supply Voltage Range: 1.8V To 5.5V
• Memory Case Style: SOP
• No. Of Pins: 8
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (18-Jun-2010)
• Package /: RoHS Compliant
• Memory Configuration: 256 X 16
• Interface Type: Serial, Microwire
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

(Ta=-40 ~ +85˚C, Vcc=1.8 ~ 2.5V)
SK frequency
SK "H" time
SK "L" time
CS "L" time
CS setup time
DI setup time
CS hold time
DI hold time
Data "1" output delay time
Data "0" output delay time
Time from CS to output establishment
Time from CS to High-Z
Write cycle time
SK frequency
SK "H" time
SK "L" time
CS "L" time
CS setup time
DI setup time
CS hold time
DI hold time
Data "1" output delay time
Data "0" output delay time
Time from CS to output establishment
Time from CS to High-Z
Write cycle time
Action timing characteristics (Ta=-40 ~ +85˚C, Vcc=2.5 ~ 5.5V)
Sync data input / output timing
Data is taken by DI in sync with the rise of SK.
At read action, data is output from DO in sync with the rise of SK.
The status signal at write (READY / BUSY) is output after tCS from the fall of CS after write command input, at the area
DO where CS is "H", and valid until the next command start bit is input. And, while CS is "L", DO becomes High-Z.
After completion of each mode execution, set CS "L" once for internal circuit reset, and execute the following action
mode.
Parameter
Parameter
DO (WRITE)
DO (READ)
CS
SK
DI
t
t
CSS
DIS
Symbol
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
f
SKH
t
CSS
CSH
t
t
f
SKH
CSS
CSH
t
t
SKL
PD1
PD0
E/W
SKL
PD1
PD0
E/W
DIS
DIH
DIS
DIH
CS
CS
SK
SV
DF
SK
SV
DF
Fig.1 Sync data input / output timing
Min.
Min.
t
230
230
200
100
100
200
100
100
0.8
0.8
PD0
50
0
1
0
-
-
-
-
-
-
-
-
-
-
-
-
t
SKH
t
DIH
Typ.
Typ.
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
STATUS VALID
t
SKL
Max.
Max.
200
200
150
150
500
200
0.7
0.7
0.7
3/16
2
5
5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
t
MHz
PD1
Unit
Unit
kHz
ms
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
µs
ns
ns
ns
ns
µs
µs
µs
ns
t
CSH
t
DF