BR93L66RF-WE2 Rohm Semiconductor, BR93L66RF-WE2 Datasheet - Page 7

• Manufacturer Part Number: BR93L66RF-WE2
• Description: IC EEPROM 4KBIT 2MHZ 8SOP
• Manufacturer: Rohm Semiconductor

Specifications of BR93L66RF-WE2

• Memory Size: 4K (256 x 16)
• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Speed: 2MHz
• Interface: Microwire, 3-Wire Serial
• Voltage - Supply: 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOP
• Clock Frequency: 2MHz
• Supply Voltage Range: 1.8V To 5.5V
• Memory Case Style: SOP
• No. Of Pins: 8
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (18-Jun-2010)
• Package /: RoHS Compliant
• Memory Configuration: 256 X 16
• Interface Type: Serial, Microwire
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Communications of the Microwire Bus are carried out by SK (serial clock), DI (serial data input), DO (serial data output), and CS
(chip select) for device selection.
When to connect one EEPROM to a microcontroller, connect it as shown in Fig. 34 (a) or Fig. 34 (b). When to use the input and
output common I/O port of the microcontroller, connect DI and DO via a resistor as shown in Fig. 34 (b) (Refer to pages 13/16.),
and connection by 3 lines is available.
In the case of plural connections, refer to Fig. 34 (c).
Communications of the Microwire Bus are started by the first "1" input after the rise of CS. This input is called a start bit. After
input of the start bit, input ope code, address and data. Address and data are input all in MSB first manners.
"0" input after the rise of CS to the start bit input is all ignored. Therefore, when there is limitation in the bit width of PIO of the
microcontroller, input "0" before the start bit input, to control the bit width.
Read (READ)
Write enable (WEN)
Write (WRITE)
Write all (WRAL)
Write disable (WDS)
Erase (ERASE)
Chip erase (ERAL)
As for
Input the address and the data in MSB first manners.
Description of operations
Command mode
* Start bit
*1 As for read, by continuous SK clock input after setting the read command, data output of the set address starts, and address data in significant order are
*2 When the read, and the write all commands are executed, data written in the selected memory cell is automatically deleted, and input data is written.
Acceptance of all the commands of this IC starts at recognition of the start bit.
The start bit means the first "1" input after the rise of CS.
sequentially output continuously. (Auto increment function)
Fig. 34-(a) Connection by 4 lines
, input either VIH or VIL.
Command
controller
Micro-
DO
CS
SK
DI
*1
*2
*2
BR93LXX
CS
SK
DI
DO
Start bit
1
1
1
1
1
1
1
Ope code
Fig. 34-(b) Connection by 3 lines
Fig. 34 Connection method with microcontroller
10
00
01
00
00
11
00
controller
Micro-
DIO
A5,A4,A3,A2,A1,A0
A5,A4,A3,A2,A1,A0
A5,A4,A3,A2,A1,A0
CS
SK
BR93L46-W
BR93LXX
CS
SK
DI
DO
7/16
A7,A6,A5,A4,A3,A2,A1,A0
A7,A6,A5,A4,A3,A2,A1,A0
A7,A6,A5,A4,A3,A2,A1,A0
A7 of BR93L56-W becomes Don't Care.
A9 of BR93L76-W becomes Don't Care.
BR93L56/66-W
Address
Fig. 34-(c) Connection example of plural devices
controller
Micro-
CS3
CS1
CS0
DO
SK
DI
A9,A8,A7,A6,A5,A4,A3,A2,A1,A0
A9,A8,A7,A6,A5,A4,A3,A2,A1,A0
A9,A8,A7,A6,A5,A4,A3,A2,A1,A0
BR93L76/86-W
Device 1
Device 2
(READ DATA)
(WRITE DATA)
(WRITE DATA)
D15 ~ D0
D15 ~ D0
D15 ~ D0
Device 3
Data