SI3853DV-T1 Vishay/Siliconix, SI3853DV-T1 Datasheet - Page 8

• Manufacturer Part Number: SI3853DV-T1
• Description: MOSFET 20V 1.8A 1.15W
• Manufacturer: Vishay/Siliconix

Specifications of SI3853DV-T1

• Product Category: MOSFET
• Transistor Polarity: P-Channel
• Drain-source Breakdown Voltage: 20 V
• Gate-source Breakdown Voltage: +/- 12 V
• Continuous Drain Current: 1.6 A
• Resistance Drain-source Rds (on): 0.2 Ohms
• Configuration: Single
• Maximum Operating Temperature: + 150 C
• Mounting Style: SMD/SMT
• Package / Case: TSOP-6
• Fall Time: 34 ns
• Minimum Operating Temperature: - 55 C
• Power Dissipation: 830 mW
• Rise Time: 34 ns
• Factory Pack Quantity: 3000
• Typical Turn-off Delay Time: 19 ns

Surface mounted power MOSFET packaging has been based on
integrated circuit and small signal packages. Those packages
have been modified to provide the improvements in heat transfer
required by power MOSFETs. Leadframe materials and design,
molding compounds, and die attach materials have been
changed. What has remained the same is the footprint of the
packages.
The basis of the pad design for surface mounted power MOSFET
is the basic footprint for the package. For the TSOP-6 package
outline drawing see
http://www.vishay.com/doc?72610
In converting the footprint to the pad set for a power MOSFET, you
must remember that not only do you want to make electrical
connection to the package, but you must made thermal connection
and provide a means to draw heat from the package, and move it
away from the package.
In the case of the TSOP-6 package, the electrical connections are
very simple. Pins 1, 2, 5, and 6 are the drain of the MOSFET and
are connected together. For a small signal device or integrated
circuit, typical connections would be made with traces that are
0.020 inches wide. Since the drain pins serve the additional
function of providing the thermal connection to the package, this
level of connection is inadequate. The total cross section of the
copper may be adequate to carry the current required for the
application, but it presents a large thermal impedance. Also, heat
spreads in a circular fashion from the heat source. In this case the
drain pins are the heat sources when looking at heat spread on the
PC board.
Figure 1 shows the copper spreading recommended footprint for
the TSOP-6 package. This pattern shows the starting point for
utilizing the board area available for the heat spreading copper. To
create this pattern, a plane of copper overlays the basic pattern on
pins 1,2,5, and 6. The copper plane connects the drain pins
electrically, but more importantly provides planar copper to draw
heat from the drain leads and start the process of spreading the
heat so it can be dissipated into the ambient air. Notice that the
planar copper is shaped like a “T” to move heat away from the
drain leads in all directions. This pattern uses all the available area
underneath the body for this purpose.
Document Number: 71743
27-Feb-04
FIGURE 1. Recommended Copper Spreading Footprint
0.014
0.026
0.35
0.65
Mounting LITTLE FOOT
0.049
1.25
http://www.vishay.com/doc?71200
0.167
4.25
0.049
1.25
0.010
0.25
for the minimum pad footprint.
0.074
1.875
0.122
3.1
and see
R
TSOP-6 Power MOSFETs
Since surface mounted packages are small, and reflow soldering
is the most common form of soldering for surface mount
components, “thermal” connections from the planar copper to the
pads have not been used. Even if additional planar copper area is
used, there should be no problems in the soldering process. The
actual solder connections are defined by the solder mask
openings. By combining the basic footprint with the copper plane
on the drain pins, the solder mask generation occurs automatically.
A final item to keep in mind is the width of the power traces. The
absolute minimum power trace width must be determined by the
amount of current it has to carry. For thermal reasons, this
minimum width should be at least 0.020 inches. The use of wide
traces connected to the drain plane provides a low impedance
path for heat to move away from the device.
REFLOW SOLDERING
Vishay Siliconix surface-mount packages meet solder reflow
reliability requirements. Devices are subjected to solder reflow as a
test preconditioning and are then reliability-tested using
temperature cycle, bias humidity, HAST, or pressure pot. The
solder reflow temperature profile used, and the temperatures and
time duration, are shown in Figures 2 and 3.
Ramp-Up Rate
Temperature @ 155 " 15_C
Temperature Above 180_C
Maximum Temperature
Time at Maximum Temperature
Ramp-Down Rate
FIGURE 2. Solder Reflow Temperature Profile
+6_C/Second Maximum
120 Seconds Maximum
70 − 180 Seconds
240 +5/−0_C
20 − 40 Seconds
+6_C/Second Maximum
Vishay Siliconix
www.vishay.com
AN823
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