EVAL-ADXL362Z-DB Analog Devices, EVAL-ADXL362Z-DB Datasheet - Page 25

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EVAL-ADXL362Z-DB

Manufacturer Part Number
EVAL-ADXL362Z-DB
Description
Acceleration Sensor Development Tools enl Datalogger Board of ADXL362
Manufacturer
Analog Devices
Datasheet

Specifications of EVAL-ADXL362Z-DB

Rohs
yes
Tool Is For Evaluation Of
ADXL362
Acceleration
2 g, 4 g, 8 g
Sensing Axis
Triple Axis
Interface Type
SPI
Operating Voltage
1.6 V to 3.5 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Operating Current
1.8 uA
Output Type
Digital
Product
Development Boards
Sensitivity
1 mg/LSB, 2 mg/LSB, 4 mg/LSB
Factory Pack Quantity
1
Data Sheet
STATUS REGISTER
Address: 0x0B, Reset: 0x40, Name: STATUS
This register includes the following bits that describe various conditions of the ADXL362.
Table 12. Bit Descriptions for STATUS
Bits
7
6
5
4
3
2
1
0
Bit Name
ERR_USER_REGS
AWAKE
INACT
ACT
FIFO_OVERRUN
FIFO_WATERMARK
FIFO_READY
DATA_READY
Settings
are performed.
overthreshold condition.
section for details.
Description
SEU Error Detect. 1 indicates one of two conditions: either an SEU event,
such as an alpha particle of a power glitch, has disturbed a user register
setting or the
startup and soft reset, and resets as soon as any register write commands
Indicates whether the accelerometer is in an active (AWAKE = 1) or
inactive (AWAKE = 0) state, based on the activity and inactivity
functionality. To enable autosleep, activity and inactivity detection must
be in linked mode or loop mode (LINK/LOOP bits in the ACT_INACT_CTL
register); otherwise, this bit defaults to 1 and should be ignored.
Inactivity. 1 indicates that the inactivity detection function has detected
an inactivity or a free fall condition.
Activity. 1 indicates that the activity detection function has detected an
FIFO Overrun. 1 indicates that the FIFO has overrun or overflowed, such
that new data replaces unread data. See the Using FIFO Interrupts
FIFO Watermark. 1 indicates that the FIFO contains at least the desired
number of samples, as set in the FIFO_SAMPLES register. See the Using
FIFO Interrupts section for details.
FIFO Ready. 1 indicates that there is at least one sample available in the
FIFO output buffer. See the Using FIFO Interrupts section for details.
Data Ready. 1 indicates that a new valid sample is available to be read.
This bit clears when a FIFO read is performed. See the Data Ready
Interrupt section for more details.
ADXL362
Rev. B | Page 25 of 44
is not configured. This bit is high upon both
Reset
0x0
0x1
0x0
0x0
0x0
0x0
0x0
0x0
ADXL362
Access
R
R
R
R
R
R
R
R

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