EVAL-ADXL343Z-M Analog Devices, EVAL-ADXL343Z-M Datasheet - Page 17

• Manufacturer Part Number: EVAL-ADXL343Z-M
• Description: Acceleration Sensor Development Tools EB
• Manufacturer: Analog Devices

Specifications of EVAL-ADXL343Z-M

• Rohs: yes
• Tool Is For Evaluation Of: ADXL343
• Acceleration: 2 g, 4 g, 8 g, 16 g
• Sensing Axis: Triple Axis
• Interface Type: I2C, SPI
• Operating Voltage: 2 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Operating Current: 140 uA
• Output Type: Digital
• Product: Evaluation Systems
• Sensitivity: 256 LSB/g, 128 LSB/g, 64 LSB/g, 32 LSG/g
• Factory Pack Quantity: 1

Data Sheet
Table 12. I
Parameter
f
t
t
t
t
t
t
t
t
t
t
t
C
1
2
3
4
5
6
SCL
1
2
3
4
5
6
7
8
9
10
11
Limits based on characterization results, with f
All values referred to the V
t
A transmitting device must internally provide an output hold time of at least 300 ns for the SDA signal (with respect to V
undefined region of the falling edge of SCL.
The maximum t
The maximum value for t
t
b
3, 4, 5, 6
6
6(max)
SDA
SCL
is the data hold time that is measured from the falling edge of SCL. It applies to data in transmission and acknowledge.
= t
3
− t
2
10
C Timing (T
− t
6
5(min)
value must be met only if the device does not stretch the low period (t
t
9
.
CONDITION
6
is a function of the clock low time (t
IH
START
and the V
A
t
Min
2.5
0.6
1.3
0.6
100
0
0.6
0.6
1.3
0
4
= 25°C, V
IL
t
levels given in Table 11.
3
Limit
S
= 2.5 V, V
SCL
Max
400
0.9
300
300
250
400
1, 2
= 400 kHz and a 3 mA sink current; not production tested.
t
10
t
6
DD I/O
3
), the clock rise time (t
= 1.8 V)
Unit
kHz
µs
µs
µs
µs
ns
µs
µs
µs
µs
ns
ns
ns
ns
pF
Figure 32. I
t
2
Rev. 0 | Page 17 of 36
2
C Timing Diagram
t
11
Description
SCL clock frequency
SCL cycle time
t
t
t
t
t
t
t
t
t
t
t
t
Capacitive load for each bus line
HIGH
LOW
HD, STA
SU, DAT
HD, DAT
SU, STA
SU, STO
BUF
R
R
F
F
, rise time of both SCL and SDA when receiving
, rise time of both SCL and SDA when receiving or transmitting
, fall time of SDA when receiving
, fall time of both SCL and SDA when transmitting
t
10
, bus-free time between a stop condition and a start condition
5
, SCL low time
, SCL high time
), and the minimum data setup time (t
, setup time for repeated start
3
, start/repeated start condition hold time
, data setup time
, stop condition setup time
, data hold time
) of the SCL signal.
CONDITION
REPEATED
START
t
7
t
4
IH(min)
5(min)
of the SCL signal) to bridge the
). This value is calculated as
t
1
CONDITION
ADXL343
STOP
t
8