IS61LV2568L-10T ISSI, Integrated Silicon Solution Inc, IS61LV2568L-10T Datasheet

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IS61LV2568L-10T

Manufacturer Part Number
IS61LV2568L-10T
Description
IC SRAM 2MBIT 10NS 44TSOP
Manufacturer
ISSI, Integrated Silicon Solution Inc
Datasheet

Specifications of IS61LV2568L-10T

Format - Memory
RAM
Memory Type
SRAM - Asynchronous
Memory Size
2M (256K x 8)
Speed
10ns
Interface
Parallel
Voltage - Supply
3.135 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
44-TSOP II
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IS61LV2568L-10T
Manufacturer:
ISSI
Quantity:
20 000
IS61LV2568L
Integrated Silicon Solution, Inc. — www.issi.com —
Rev. D
04/28/08
256K x 8 HIGH-SPEED CMOS STATIC RAM
Copyright © 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
FEATURES
• High-speed access time: 8, 10 ns
• Operating Current: 50mA (typ.)
• Standby Current: 700µA (typ.)
• Multiple center power and ground pins for
• Easy memory expansion with CE and OE
• CE power-down
• TTL compatible inputs and outputs
• Single 3.3V power supply
• Packages available:
• Lead-free available
FUNCTIONAL BLOCK DIAGRAM
greater noise immunity
options
– 36-pin 400-mil SOJ
– 44-pin TSOP (Type II)
I/O0-I/O7
A0-A17
V
GND
DD
OE
WE
CE
DECODER
CIRCUIT
CONTROL
CIRCUIT
DATA
I/O
1-800-379-4774
DESCRIPTION
The
262,144-word by 8-bit CMOS static RAM. The IS61LV2568L
is fabricated using
nology. This highly reliable process coupled with innova-
tive circuit design techniques, yields higher performance
and low power consumption devices.
When CE is HIGH (deselected), the device assumes a
standby mode at which the power dissipation can be
reduced down to 36mW (max.) with CMOS input levels.
The IS61LV2568L operates from a single 3.3V power
supply and all inputs are TTL-compatible.
The IS61LV2568L is available in 36-pin 400-mil SOJ and
44-pin TSOP (Type II) packages.
ISSI
MEMORY ARRAY
IS61LV2568L is a very high-speed, low power,
COLUMN I/O
256K X 8
ISSI
's high-performance CMOS tech-
APRIL 2008
1

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IS61LV2568L-10T Summary of contents

Page 1

... CMOS input levels. The IS61LV2568L operates from a single 3.3V power supply and all inputs are TTL-compatible. The IS61LV2568L is available in 36-pin 400-mil SOJ and 44-pin TSOP (Type II) packages. A0-A17 DECODER ...

Page 2

... IS61LV2568L PIN CONFIGURATION 36-Pin SOJ I/ I/ GND A17 14 23 A16 15 22 A15 16 21 A14 17 20 A13 18 19 PIN DESCRIPTIONS A0-A17 Address Inputs CE Chip Enable Input OE Output Enable Input WE Write Enable Input I/O0-I/O7 Bidirectional Ports V Power DD GND Ground NC No Connection ...

Page 3

... IS61LV2568L TRUTH TABLE Mode Not Selected X (Power-down) Output Disabled H Read H Write L ABSOLUTE MAXIMUM RATINGS Symbol Parameter V Supply voltage with Respect to GND DD V Terminal Voltage with Respect to GND TERM T Storage Temperature STG P Power Dissipation D Notes: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied ...

Page 4

... IS61LV2568L POWER SUPPLY CHARACTERISTICS Symbol Parameter Test Conditions = Max Operating Supply Current mA Max. OUT I TTL Standby V = Max Current ≥ V (TTL Inputs max IH I CMOS Standby V = Max ≥ V Current – 0.2V, DD ≥ V (CMOS Inputs) V – 0.2V ≤ 0.2V Note address and data inputs are cycling at the maximum frequency means no input lines change. ...

Page 5

... IS61LV2568L AC TEST CONDITIONS Parameter Input Pulse Level Input Rise and Fall Times Input and Output Timing and Reference Levels Output Load AC TEST LOADS Z = 50Ω O OUTPUT Figure 1 Integrated Silicon Solution, Inc. — www.issi.com — Rev. D 04/28/08 Unit 1.5V See Figures 1 and 2 3.3V 50Ω ...

Page 6

... IS61LV2568L READ CYCLE SWITCHING CHARACTERISTICS Symbol Parameter t Read Cycle Time RC t Address Access Time AA t Output Hold Time OHA CE Access Time t ACE OE Access Time t DOE OE to Low-Z Output t (2) LZOE OE to High-Z Output t (2) HZOE CE to Low-Z Output t (2) LZCE CE to High-Z Output ...

Page 7

... IS61LV2568L AC WAVEFORMS (1,2) (Address Controlled) ( READ CYCLE NO. 1 ADDRESS D OUT PREVIOUS DATA VALID (1,3) (CE and OE Controlled) READ CYCLE NO. 2 ADDRESS LZCE HIGH-Z D OUT Notes HIGH for a Read Cycle. 2. The device is continuously selected. OE Address is valid prior to or coincident with CE LOW transitions. Integrated Silicon Solution, Inc. — www.issi.com — ...

Page 8

... IS61LV2568L WRITE CYCLE SWITCHING CHARACTERISTICS Symbol Parameter t Write Cycle Time Write End t SCE t Address Setup Time to Write End AW t Address Hold from Write End HA t Address Setup Time SA WE Pulse Width (OE = HIGH PWE WE Pulse Width (OE = LOW PWE t Data Setup to Write End ...

Page 9

... IS61LV2568L AC WAVEFORMS (1,2) (CE Controlled HIGH or LOW) WRITE CYCLE NO. 1 ADDRESS DATA UNDEFINED OUT D IN Note: 1. The internal Write time is defined by the overlap LOW and WE = LOW. All signals must be in valid states to initiate a Write, but any can be deasserted to terminate the Write. The Data Input Setup and Hold timing is referenced to the rising or falling edge of the signal that terminates the Write. Integrated Silicon Solution, Inc. — ...

Page 10

... IS61LV2568L AC WAVEFORMS (1) (WE Controlled HIGH during Write Cycle) WRITE CYCLE NO. 2 ADDRESS OE CE LOW DATA UNDEFINED OUT D IN Note: 1. The internal Write time is defined by the overlap LOW and WE = LOW. All signals must be in valid states to initiate a Write, but any can be deasserted to terminate the Write. The Data Input Setup and Hold timing is referenced to the rising or falling edge of the signal that terminates the Write ...

Page 11

... IS61LV2568L ORDERING INFORMATION Commercial Range: 0°C to +70°C Speed (ns) Order Part No. 8 IS61LV2568L-8K IS61LV2568L-8T IS61LV2568L-8TL 10 IS61LV2568L-10T IS61LV2568L-10TL Industrial Range: –40°C to +85°C Speed (ns) Order Part No. 10 IS61LV2568L-10KI IS61LV2568L-10KLI Integrated Silicon Solution, Inc. — www.issi.com — Rev. D 04/28/08 Package 400-mil SOJ ...

Page 12

PACKAGING INFORMATION 400-mil Plastic SOJ Package Code Millimeters Inches Symbol Min Max Min No. Leads ( 3.25 3.75 0.128 0.148 A1 0.64 — 0.025 A2 2.08 — 0.082 B 0.38 0.51 0.015 0.020 ...

Page 13

PACKAGING INFORMATION Millimeters Inches Symbol Min Max Min No. Leads ( 3.25 3.75 0.128 0.148 A1 0.64 — 0.025 A2 2.08 — 0.082 B 0.38 0.51 0.015 0.020 b 0.66 0.81 0.026 0.032 C 0.18 0.33 0.007 0.013 ...

Page 14

PACKAGING INFORMATION Plastic TSOP Package Code: T (Type II Millimeters Inches Symbol Min Max Min Ref. Std. No. Leads ( — 1.20 — A1 0.05 0.15 0.002 0.006 b 0.30 0.52 0.012 ...

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