MT46V64M8BN-5B:F Micron Technology Inc, MT46V64M8BN-5B:F Datasheet - Page 39

• Manufacturer Part Number: MT46V64M8BN-5B:F
• Description: IC DDR SDRAM 512MBIT 5NS 60FBGA
• Manufacturer: Micron Technology Inc
• Type: DDR SDRAMr

Specifications of MT46V64M8BN-5B:F

• Format - Memory: RAM
• Memory Type: DDR SDRAM
• Memory Size: 512M (64M x 8)
• Speed: 5ns
• Interface: Parallel
• Voltage - Supply: 2.5 V ~ 2.7 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 60-FBGA
• Organization: 64Mx8
• Density: 512Mb
• Address Bus: 15b
• Access Time (max): 700ps
• Maximum Clock Rate: 400MHz
• Operating Supply Voltage (typ): 2.6V
• Package Type: FBGA
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 2.7V
• Operating Supply Voltage (min): 2.5V
• Supply Current: 195mA
• Pin Count: 60
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Figure 15:
Figure 16:
PDF: 09005aef80a1d9d4/Source: 09005aef82a95a3a
DDR_x4x8x16_Core2.fm - 512Mb DDR: Rev. N; Core DDR Rev. B 2/09 EN
Reduced Drive Pull-Down Characteristics
Reduced Drive Pull-Up Characteristics
40. The voltage levels used are derived from a minimum V
41.
42. V
43.
39d. The driver pull-up current variation, within nominal voltage and temperature
39e. The full ratio variation of the MAX-to-MIN pull-up and pull-down current should
39f. The full ratio variation of the nominal pull-up to pull-down current should be
80
70
60
50
40
30
20
10
0
load. In practice, the voltage levels obtained from a properly terminated bus will pro-
vide significantly different voltage values.
V
width can not be greater than 1/3 of the cycle rate. VIL undershoot: VIL (MIN) =
for a pulse width ≤ 3ns, and the pulse width can not be greater than 1/3 of the cycle
rate.
t
prevail over
-10
-20
-30
-40
-50
-60
-70
-80
HZ (MAX) will prevail over
0 . 0
0
IH
DD
0.0
limits, is expected, but not guaranteed, to lie within the inner bounding lines of
the V-I curve of Figure 16 on page 39.
be between 0.71 and 1.4 for device drain-to-source voltages from 0.1V to 1.0V at
the same voltage and temperature.
unity ±10%, for device drain-to-source voltages from 0.1V to 1.0V.
overshoot: V
and V
DD
0 . 5
0.5
t
DQSCK (MIN) +
Q must track each other.
IH
(MAX) = V
1 . 0
1.0
V
DD
V
Q - V
OUT
39
(V)
OUT
t
DQSCK (MAX) +
t
(V)
RPRE (MAX) condition.
DD
1 . 5
1.5
Q + 1.5V for a
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Electrical Specifications – DC and AC
2.0
2.0
512Mb: x4, x8, x16 DDR SDRAM
t
RPST (MAX) condition.
pulse width ≤ 3ns, and the pulse
2.5
2.5
DD
level and the referenced test
©2000 Micron Technology, Inc. All rights reserved.
t
LZ (MIN) will
–
1.5V