IS42S32800D-6BL ISSI, Integrated Silicon Solution Inc, IS42S32800D-6BL Datasheet - Page 46
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IS42S32800D-6BL
Manufacturer Part Number
IS42S32800D-6BL
Description
IC SDRAM 256MBIT 166MHZ 90BGA
Manufacturer
ISSI, Integrated Silicon Solution Inc
Type
SDRAMr
Specifications of IS42S32800D-6BL
Format - Memory
RAM
Memory Type
SDRAM
Memory Size
256M (8Mx32)
Speed
166MHz
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
90-BGA
Organization
8Mx32
Density
256Mb
Address Bus
13b
Access Time (max)
6.5/5.4ns
Maximum Clock Rate
166MHz
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
180mA
Pin Count
90
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
IS42S32800D-6BL
Manufacturer:
ISSI, Integrated Silicon Solution Inc
Quantity:
10 000
Company:
Part Number:
IS42S32800D-6BL-TR
Manufacturer:
ISSI, Integrated Silicon Solution Inc
Quantity:
10 000
Company:
Part Number:
IS42S32800D-6BLI
Manufacturer:
ISSI, Integrated Silicon Solution Inc
Quantity:
10 000
Part Number:
IS42S32800D-6BLI
Manufacturer:
ISSI
Quantity:
20 000
Company:
Part Number:
IS42S32800D-6BLI-TR
Manufacturer:
ISSI, Integrated Silicon Solution Inc
Quantity:
10 000
BA1 are treated as “Don’t Care.” Once a bank has been
IS42S32800D, IS45S32800D
PRECHARGE
The PRECHARGE command (see figure) is used to deac-
tivate the open row in a particular bank or the open row in
all banks.The bank(s) will be available for a subsequent row
access some specified time (t
command is issued. Input A10 determines whether one or
all banks are to be precharged, and in the case where only
one bank is to be precharged, inputs BA0, BA1 select the
bank. When all banks are to be precharged, inputs BA0,
precharged, it is in the idle state and must be activated
prior to any READ or WRITE commands being issued to
that bank.
POWER-DOWN
Power-down occurs if CKE is registered LOW coincident
with a NOP or COMMAND INHIBIT when no accesses
are in progress. If power-down occurs when all banks are
idle, this mode is referred to as precharge power-down;
if power-down occurs when there is a row active in either
bank, this mode is referred to as active power-down.
Entering power-down deactivates the input and output
buffers, excluding CKE, for maximum power savings while
in standby. The device may not remain in the power-down
state longer than the refresh period (64ms) since no refresh
operations are performed in this mode.
The power-down state is exited by registering a NOP or
COMMAND INHIBIT and CKE HIGH at the desired clock
edge (meeting t
POWER-DOWN
46
cks
COMMAND
). See figure below (Power-Down).
CKE
CLK
All banks idle
Enter power-down mode
rp
) after the PRECHARGE
t
NOP
CKS
Input buffers gated off
less than T
REF
PRECHARGE Command
Exit power-down mode
BA0, BA1
A0-A9, A11
CKE
RAS
CAS
CLK
A10
WE
CS
≥ t
CKS
HIGH
NOP
Integrated Silicon Solution, Inc. - www.issi.com
DON'T CARE
BANK ADDRESS
BANK SELECT
ACTIVE
ALL BANKS
t
t
t
RCD
RAS
RC
12/01/09
Rev. C