IS61VPS25636A-200TQLI ISSI, Integrated Silicon Solution Inc, IS61VPS25636A-200TQLI Datasheet - Page 27

• Manufacturer Part Number: IS61VPS25636A-200TQLI
• Description: IC SRAM 9MBIT 200MHZ 100TQFP
• Manufacturer: ISSI, Integrated Silicon Solution Inc

Specifications of IS61VPS25636A-200TQLI

• Format - Memory: RAM
• Memory Type: SRAM - Synchronous
• Memory Size: 9M (256K x 36)
• Speed: 200MHz
• Interface: Parallel
• Voltage - Supply: 2.375 V ~ 2.625 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Density: 9Mb
• Access Time (max): 3.1ns
• Sync/async: Synchronous
• Architecture: SDR
• Clock Freq (max): 200MHz
• Operating Supply Voltage (typ): 2.5V
• Address Bus: 18b
• Package Type: TQFP
• Operating Temp Range: -40C to 85C
• Number Of Ports: 4
• Supply Current: 275mA
• Operating Supply Voltage (min): 2.375V
• Operating Supply Voltage (max): 2.625V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Word Size: 36b
• Number Of Words: 256K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

IS61LPS51218A, IS61LPS25636A, IS61LPS25632A, IS64LPS25636A,
IS61VPS51218A, IS61VPS25636A
119 BgA BOUNDARY SCAN ORDER (256K x 36)
119 BgA BOUNDARY SCAN ORDER (512K x 18)
Integrated Silicon Solution, Inc.
Rev. K
01/19/10
Bit # Name
Bit # Name
10
11
12
13
14
15
16
17
18
10
11
12
13
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
Signal Bump
Signal Bump
DQa
DQa
DQa
DQa
DQa
DQa
DQa
DQa
DQa
DQb
DQa
DQa
DQa
DQa
DQa
ZZ
ZZ
A
A
A
A
A
A
A
A
A
A
A
A
A
A
6M
2R
6R
3B
5B
6P
7N
6K
7P
6N
7K
6H
2R
6R
3B
5B
7P
6N
7K
6H
3T
4T
5T
7L
6L
7T
2T
3T
5T
6L
7T
ID
ID
Bit #
Bit #
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
14
15
16
17
18
19
20
21
22
23
24
25
26
Signal Bump
Signal Bump
ADSC
ADSC
Name
ADSP
Name
ADSP
BWE
BWE
DQb
DQb
DQb
DQb
DQb
DQb
DQb
DQb
ADV
DQa
DQa
DQa
DQa
ADV
CLK
GW
GW
OE
OE
A
A
A
A
A
A
4M
4M
7G
7E
7D
7H
6G
6E
6D
6A
5A
4G
4A
4B
4H
4K
6B
7G
7E
6D
6A
5A
4G
4A
4B
4H
6F
4F
6F
6T
4F
ID
ID
Bit #
Bit #
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
27
28
29
30
31
32
33
34
35
36
37
38
39
Signal Bump
Signal Bump
Name
Name
BWa
BWb
BWc
BWd
BWa
BWb
DQc
DQc
DQc
DQc
DQc
DQc
DQc
DQc
DQc
DQb
DQb
DQb
DQb
CE2
CLK
CE2
CE
NC
CE
NC
A
A
A
A
A
5G
3G
2D
1G
2H
1D
2G
1H
5R
3G
1D
2G
1H
5R
5L
3L
2B
4E
3A
2A
1E
2F
2E
4K
6B
5L
2B
4E
3A
2A
2E
ID
ID
Bit #
Bit #
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
40
41
42
43
44
45
46
47
48
49
50
51
Signal Bump
MODE
Signal Bump
MODE
Name
Name
DQd
DQd
DQd
DQd
DQd
DQd
DQd
DQd
DQd
DQb
DQb
DQb
DQb
DQb
A1
A0
A1
A0
A
A
A
A
A
A
A
A
2M
2M
1N
2N
3R
2C
3C
5C
6C
4N
1N
3R
2C
3C
5C
6C
4N
2K
1L
1P
1K
2L
2P
4P
2K
1L
2P
4P
ID
ID
27