MT48LC32M16A2P-75 L:C Micron Technology Inc, MT48LC32M16A2P-75 L:C Datasheet - Page 27

IC SDRAM 512MBIT 133MHZ 54TSOP

MT48LC32M16A2P-75 L:C

Manufacturer Part Number
MT48LC32M16A2P-75 L:C
Description
IC SDRAM 512MBIT 133MHZ 54TSOP
Manufacturer
Micron Technology Inc
Type
SDRAMr
Datasheet

Specifications of MT48LC32M16A2P-75 L:C

Format - Memory
RAM
Memory Type
SDRAM
Memory Size
512M (32Mx16)
Speed
133MHz
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
54-TSOP II
Organization
32Mx16
Density
512Mb
Address Bus
15b
Access Time (max)
6/5.4ns
Maximum Clock Rate
133MHz
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
115mA
Pin Count
54
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Figure 16:
PDF: 09005aef809bf8f3/Source: 09005aef80818a4a
512MbSDRAM.fm - Rev. L 10/07 EN
Terminating a READ Burst
Note:
COMMAND
COMMAND
ADDRESS
ADDRESS
DQM is LOW.
CLK
CLK
DQ
DQ
BANK,
COL n
T0
T0
BANK,
COL n
READ
READ
CL = 2
T1
T1
NOP
NOP
CL = 3
27
T2
T2
NOP
NOP
D
OUT
n
Micron Technology, Inc., reserves the right to change products or specifications without notice.
T3
T3
NOP
NOP
n + 1
D
D
OUT
OUT
n
TERMINATE
TERMINATE
BURST
BURST
T4
T4
x = 1 cycle
n + 2
D
n + 1
D
Transitioning Data
OUT
OUT
512Mb: x4, x8, x16 SDRAM
x = 2 cycles
T5
T5
NOP
NOP
n + 3
n + 2
D
D
OUT
OUT
©2000 Micron Technology, Inc. All rights reserved.
T6
T6
NOP
NOP
n + 3
D
OUT
Operations
Don’t Care
T7
NOP

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